iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	psl: cover directive works on a sequence, not on a property.	Tristan Gingold	2016-02-14	1	-0/+8
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*	PSL: move canon code to canon.adb	Tristan Gingold	2016-02-14	1	-0/+22
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*	Clean up some code and comments about constant declarations.	Tristan Gingold	2016-01-19	1	-4/+4
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*	Add support for conditional assignments.	Tristan Gingold	2016-01-16	1	-6/+85
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*	Set type staticness for a constant declaration and attribute specification.	Tristan Gingold	2016-01-11	1	-6/+9
\| \| \| \|	Fix for issue 10.
*	Fix crash on invalid individual association.	Tristan Gingold	2015-11-07	1	-0/+4
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*	Translate: explicitly clean transient types.	Tristan Gingold	2015-09-02	1	-0/+8
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*	iirs: block_statement is a ref.	Tristan Gingold	2015-08-31	1	-1/+2
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*	Replace fat accesses by bounds accesses	Tristan Gingold	2015-08-29	1	-0/+3
\| \| \| \| \|	translate: separate info for signals from object. Improve some error messages.
*	Add suspend_flag.	Tristan Gingold	2015-06-07	1	-0/+29
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*	Rework of overload resolution in implicit conversions.	Tristan Gingold	2015-05-26	1	-9/+0
\| \| \| \|	Fix tiket 81.
*	Preliminary work to support external names (parse, semantic)	Tristan Gingold	2015-05-23	1	-44/+80
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*	errors: remove error_msg and warning_msg.	Tristan Gingold	2015-05-17	1	-1/+1
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*	Give priority to function calls without implicit conversion.	Tristan Gingold	2015-05-16	1	-0/+9
\| \| \| \|	Fix ticket 64.
*	Change library format: now store file checksum instead of file time stamp.	Tristan Gingold	2015-05-13	1	-3/+3
\| \| \| \|	For ticket 48.
*	Add ieee context files.	Tristan Gingold	2015-05-12	1	-0/+2
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*	Add context declaration and reference (vhdl 2008).	Tristan Gingold	2015-05-12	1	-6/+47
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*	iirs.ads: fix indentation and adjust pnodes.py	Tristan Gingold	2015-01-24	1	-249/+249
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*	vhdl2008: expanded names in for-generate statements.	Tristan Gingold	2015-01-12	1	-0/+2
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*	vhdl2008: handle expanded names in if-generate statements.	Tristan Gingold	2015-01-12	1	-0/+4
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*	vhdl08: forbid simple block_specification for labeled if-generate statement.	Tristan Gingold	2015-01-10	1	-0/+9
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*	Initial rework for vhdl 2008 generate statements.	Tristan Gingold	2015-01-03	1	-23/+97
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*	vhdl 2008: handle sized bit strings.	Tristan Gingold	2014-12-30	1	-14/+41
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*	Rework string literals: store literals position.	Tristan Gingold	2014-12-29	1	-51/+24
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*	Fix ghdl -m for jit: handle multiple libraries.	Tristan Gingold	2014-12-23	1	-0/+3
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*	Reduce size of library_declaration.	Tristan Gingold	2014-12-22	1	-13/+15
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*	Recognize some ieee.std_logic_1164 functions.	Tristan Gingold	2014-12-16	1	-1/+23
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*	Use same node for implicit and explicit subprogram declarations.	Tristan Gingold	2014-12-15	1	-106/+64
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*	Reduce size of configuration declaration and guard signal declaration.	Tristan Gingold	2014-12-14	1	-8/+8
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*	reduce size of enumeration_literal.	Tristan Gingold	2014-12-14	1	-25/+14
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*	iirs: reduce size of interface objects.	Tristan Gingold	2014-12-14	1	-26/+25
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*	iirs: reduce size of signal_declaration.	Tristan Gingold	2014-12-14	1	-14/+24
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*	iirs: reduce memory size.	Tristan Gingold	2014-12-14	1	-49/+49
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*	Put attribute_value_chain in parent.	Tristan Gingold	2014-12-14	1	-78/+13
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*	iirs: move delay_mechanism to flag1; adjust xtools/pnodes.py for new sources.	Tristan Gingold	2014-12-13	1	-3/+3
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*	Create src/vhdl subdirectory.	Tristan Gingold	2014-11-04	1	-0/+6445