iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	vhdl: renames disp_vhdl to prints	Tristan Gingold	2019-05-30	1	-2/+2
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*	Add simple_IO - to be used instead of Text_IO.	Tristan Gingold	2019-05-19	1	-3/+3
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*	vhdl: extract vhdl.errors from errorout.	Tristan Gingold	2019-05-08	1	-0/+1
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*	vhdl: renames iirs_walk to vhdl-nodes_walk	Tristan Gingold	2019-05-08	1	-1/+1
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*	vhdl: move iirs_utils to vhdl.utils	Tristan Gingold	2019-05-06	1	-1/+1
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*	vhdl: move disp_tree and disp_vhdl as vhdl child.	Tristan Gingold	2019-05-04	1	-2/+2
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*	Rework list implementation, use iterator.	Tristan Gingold	2017-11-11	1	-8/+10
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*	Create default value for ports.	Tristan Gingold	2017-05-09	1	-2/+1
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*	vhdl08: allow unaffected in sequential signal assignments.	Tristan Gingold	2016-11-01	1	-15/+52
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*	Add translation for selected signal assignment.	Tristan Gingold	2016-11-01	1	-2/+26
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*	canon: do not set formal of association by position.	Tristan Gingold	2016-10-19	1	-8/+2
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*	Rewrite most of error and warning messages.	Tristan Gingold	2016-08-02	1	-2/+4
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*	Add support for conditional assignments.	Tristan Gingold	2016-01-16	1	-12/+27
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*	Move translate and simulate.	Tristan Gingold	2014-11-05	1	-0/+182