| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | vhdl: parse PSL prev/stable/rose/fell builtin calls. For #662 | Tristan Gingold | 2020-06-02 | 1 | -115/+214 | |
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| * | vhdl-nodes: use a flag field for direction. | Tristan Gingold | 2020-05-20 | 1 | -1/+1 | |
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| * | vhdl: allow attribute specifications in protected types. For #1252 | Tristan Gingold | 2020-04-20 | 1 | -252/+256 | |
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| * | types: introduce Direction_Type, which replaces Iir_Direction. | Tristan Gingold | 2020-04-20 | 1 | -25/+25 | |
| | | | | | Global renaming. | |||||
| * | vhdl: add scalar_size. Size of scalar types is computed during analysis. | Tristan Gingold | 2020-04-06 | 1 | -240/+286 | |
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| * | synthesis: add option --vendor-library= for synthesis. | Tristan Gingold | 2020-03-10 | 1 | -210/+225 | |
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| * | ams-vhdl: add support for 'delayed for quantity. | Tristan Gingold | 2019-12-31 | 1 | -25/+45 | |
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| * | ams-vhdl: handle zoh, ltf and ztf attributes. | Tristan Gingold | 2019-12-31 | 1 | -29/+119 | |
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| * | ams-vhdl: add simultaneous null statement. | Tristan Gingold | 2019-12-30 | 1 | -87/+123 | |
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| * | ams-vhdl: improve error recovery | Tristan Gingold | 2019-12-30 | 1 | -1/+2 | |
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| * | ams-vhdl: analyze, canon and print simultaneous procedural statements. | Tristan Gingold | 2019-12-30 | 1 | -86/+92 | |
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| * | ams-vhdl: fix tree consistency for terminal declaration. | Tristan Gingold | 2019-12-30 | 1 | -1/+1 | |
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| * | ams-vhdl: check nature for record natures and terminals. | Tristan Gingold | 2019-12-30 | 1 | -225/+247 | |
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| * | vhdl-ams: fix tree consistency for subnature declaration. | Tristan Gingold | 2019-12-29 | 1 | -1/+1 | |
| | | | | | Also fix use and canon for it. | |||||
| * | vhdl: improve support of AMS-vhdl (array and record natures, source quantities) | Tristan Gingold | 2019-12-28 | 1 | -379/+1315 | |
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| * | vhdl: add Has_Delay_Machanism for optional 'inertial' printing. | Tristan Gingold | 2019-12-26 | 1 | -91/+121 | |
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| * | vhdl: allow attributes in vunit declarations. | Tristan Gingold | 2019-10-30 | 1 | -197/+203 | |
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| * | vhdl: add exit/next flags. | Tristan Gingold | 2019-09-18 | 1 | -63/+107 | |
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| * | vhdl: renames Conditional_Expression to Conditional_Expression_Chain. | Tristan Gingold | 2019-09-02 | 1 | -11/+11 | |
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| * | synth: handle verification units. | Tristan Gingold | 2019-08-20 | 1 | -202/+226 | |
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| * | vhdl: parse verification unit (WIP). | Tristan Gingold | 2019-08-17 | 1 | -243/+256 | |
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| * | vhdl: declare verification units (WIP). | Tristan Gingold | 2019-08-16 | 1 | -263/+392 | |
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| * | vhdl: improve reprint of inertial association. | Tristan Gingold | 2019-08-11 | 1 | -152/+156 | |
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| * | vhdl: remove unused Get/Set_Choice_Order. | Tristan Gingold | 2019-08-09 | 1 | -275/+247 | |
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| * | vhdl: remove severity from cover, report and severity from assume. | Tristan Gingold | 2019-08-08 | 1 | -84/+86 | |
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| * | vhdl-nodes: gather PSL nodes, regenerate nodes_meta. | Tristan Gingold | 2019-08-07 | 1 | -95/+87 | |
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| * | Add support for PSL assumptions, used in formal verification (#880) | Pepijn de Vos | 2019-08-07 | 1 | -101/+137 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | * vhdl: make the parser understand PSL assume * assume does not actually have report according to the spec. Just a property. * add SPL assume to semantic analysis * canonicalise PSL assume * add assume to annotations * add PSL assume to simulation code * statement -> directive * add assume to translation files * update ticked24 testcase * correctly parse assume * add assume testcase * refactor chunk of duplicated code | |||||
| * | vhdl: linearize analyze and evaluation of concat operators. | Tristan Gingold | 2019-07-26 | 1 | -1/+13 | |
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| * | vhdl: rename Cover_Statement to Cover_Directive. | Tristan Gingold | 2019-07-04 | 1 | -18/+18 | |
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| * | vhdl: parse and analyze restrict directive. | Tristan Gingold | 2019-07-04 | 1 | -89/+121 | |
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| * | vhdl: add anonymous_signal_declaration. | Tristan Gingold | 2019-07-03 | 1 | -151/+173 | |
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| * | vhdl-disp_vhdl: print literals and identifiers from the source. | Tristan Gingold | 2019-05-29 | 1 | -264/+292 | |
| | | | | | Add Literal_Length and set it in the parser. | |||||
| * | vhdl: get rid of Get/Set_Physical_Unit. | Tristan Gingold | 2019-05-28 | 1 | -280/+258 | |
| | | | | | Use integer_literal for evaluated physical literals. | |||||
| * | vhdl: update AMS parsing. | Tristan Gingold | 2019-05-24 | 1 | -172/+176 | |
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| * | vhdl-parse: Add Has_Is for block_statement. | Tristan Gingold | 2019-05-24 | 1 | -1/+3 | |
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| * | vhdl-nodes: make subtype_Definition like the others. | Tristan Gingold | 2019-05-23 | 1 | -201/+205 | |
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| * | vhdl-nodes: fix minor typo. | Tristan Gingold | 2019-05-11 | 1 | -54/+50 | |
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| * | vhdl: replace Iir_Int64 by Int64, and Iir_Fp64 by Fp64. | Tristan Gingold | 2019-05-10 | 1 | -50/+50 | |
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| * | vhdl: move nodes_meta package to vhdl child. | Tristan Gingold | 2019-05-06 | 1 | -0/+10786 | |
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index : iCE40/ghdl | |
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