| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | vhdl-parse: improve recovery for incorrect end identifier. | Tristan Gingold | 2020-02-13 | 1 | -8/+27 |
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| * | ams-vhdl: add simultaneous null statement. | Tristan Gingold | 2019-12-30 | 1 | -24/+130 |
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| * | ams-vhdl: handle record nature end name. | Tristan Gingold | 2019-12-30 | 1 | -0/+3 |
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| * | ams-vhdl: improve error recovery | Tristan Gingold | 2019-12-30 | 1 | -1/+2 |
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| * | vhdl: improve support of AMS-vhdl (array and record natures, source quantities) | Tristan Gingold | 2019-12-28 | 1 | -206/+1069 |
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| * | vhdl: add Has_Delay_Machanism for optional 'inertial' printing. | Tristan Gingold | 2019-12-26 | 1 | -2/+13 |
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| * | vhdl: extract sem_concurrent_statement, to handle hdl stmt in vunits. | Tristan Gingold | 2019-10-25 | 1 | -26/+25 |
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| * | vhdl-parse: do not scan PSL keywords in vunit declarations. | Tristan Gingold | 2019-10-24 | 1 | -0/+4 |
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| * | vhdl-sem_decls: make sem_declaration public. | Tristan Gingold | 2019-10-23 | 1 | -0/+2 |
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| * | vhdl-parse: parse declarations in vunit. | Tristan Gingold | 2019-10-21 | 1 | -327/+352 |
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| * | vhdl: handle labels in verification units. | Tristan Gingold | 2019-10-21 | 1 | -8/+62 |
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| * | vhdl: check cover/restrict is followed by a sequence. | Tristan Gingold | 2019-10-16 | 1 | -2/+2 |
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| * | vhdl: handle cover and restrict within vunit. | Tristan Gingold | 2019-10-15 | 1 | -0/+4 |
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| * | vhdl: renames Conditional_Expression to Conditional_Expression_Chain. | Tristan Gingold | 2019-09-02 | 1 | -4/+4 |
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| * | vhdl: handle architecture in verification unit hierarchical name. | Tristan Gingold | 2019-08-20 | 1 | -1/+11 |
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| * | vhdl: handle assume in verification units. | Tristan Gingold | 2019-08-20 | 1 | -0/+3 |
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| * | synth: handle verification units. | Tristan Gingold | 2019-08-20 | 1 | -0/+1 |
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| * | vhdl: parse verification unit (WIP). | Tristan Gingold | 2019-08-17 | 1 | -67/+134 |
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| * | vhdl: handle PSL keywords as vhdl08 reserved words; switch to PSL scanner mode. | Tristan Gingold | 2019-08-14 | 1 | -0/+9 |
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| * | vhdl: add PSL keywords to vhdl08 reserved words. | Tristan Gingold | 2019-08-14 | 1 | -37/+33 |
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| * | vhdl: avoid crash on incorrect unit name. | Tristan Gingold | 2019-08-10 | 1 | -2/+22 |
| | | | | | Fix #886 | ||||
| * | vhdl: handle subtype indication (with range) in discrete_range. | Tristan Gingold | 2019-08-10 | 1 | -0/+3 |
| | | | | | For #877 | ||||
| * | Add support for PSL assumptions, used in formal verification (#880) | Pepijn de Vos | 2019-08-07 | 1 | -4/+26 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | * vhdl: make the parser understand PSL assume * assume does not actually have report according to the spec. Just a property. * add SPL assume to semantic analysis * canonicalise PSL assume * add assume to annotations * add PSL assume to simulation code * statement -> directive * add assume to translation files * update ticked24 testcase * correctly parse assume * add assume testcase * refactor chunk of duplicated code | ||||
| * | vhdl: allow discrete subtype indication for discrete_range. | Tristan Gingold | 2019-08-06 | 1 | -0/+3 |
| | | | | | For #877 | ||||
| * | vhdl: rename Cover_Statement to Cover_Directive. | Tristan Gingold | 2019-07-04 | 1 | -1/+1 |
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| * | parse: improve error message for incorrect use of '!'. | Tristan Gingold | 2019-07-04 | 1 | -0/+4 |
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| * | vhdl: parse and analyze restrict directive. | Tristan Gingold | 2019-07-04 | 1 | -3/+25 |
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| * | vhdl-parse: improve error message in case of unexpected | Tristan Gingold | 2019-06-13 | 1 | -0/+12 |
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| * | vhdl-disp_vhdl: print literals and identifiers from the source. | Tristan Gingold | 2019-05-29 | 1 | -6/+14 |
| | | | | | Add Literal_Length and set it in the parser. | ||||
| * | vhdl: move Current_Text from vhdl-utils to vhdl-parse. | Tristan Gingold | 2019-05-25 | 1 | -0/+20 |
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| * | vhdl: update AMS parsing. | Tristan Gingold | 2019-05-24 | 1 | -1/+15 |
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| * | vhdl-parse: Add Has_Is for block_statement. | Tristan Gingold | 2019-05-24 | 1 | -0/+2 |
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| * | vhdl-parse: minor changes for disp_vhdl. | Tristan Gingold | 2019-05-24 | 1 | -0/+5 |
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| * | vhdl: add hook on free_node, automatically free | Tristan Gingold | 2019-05-22 | 1 | -3/+0 |
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| * | vhdl-parse: strenghten. | Tristan Gingold | 2019-05-15 | 1 | -9/+13 |
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| * | errorout: add messages group instead of continuation. | Tristan Gingold | 2019-05-12 | 1 | -24/+27 |
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| * | vhdl-parse: improve error messages. Fix #818 | Tristan Gingold | 2019-05-11 | 1 | -0/+14 |
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| * | vhdl: decouple errorouts a bit more. | Tristan Gingold | 2019-05-10 | 1 | -3/+5 |
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| * | psl: add psl-types, psl-nodes_priv. | Tristan Gingold | 2019-05-10 | 1 | -0/+1 |
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| * | vhdl: replace Iir_Int64 by Int64, and Iir_Fp64 by Fp64. | Tristan Gingold | 2019-05-10 | 1 | -3/+3 |
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| * | vhdl: extract vhdl.errors from errorout. | Tristan Gingold | 2019-05-08 | 1 | -0/+1 |
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| * | vhdl-nodes_utils: renaming. | Tristan Gingold | 2019-05-07 | 1 | -43/+42 |
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| * | vhdl: renames iir_chains to vhdl.nodes_utils. Remove iir_chain_handling. | Tristan Gingold | 2019-05-06 | 1 | -46/+54 |
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| * | vhdl: move iirs_utils to vhdl.utils | Tristan Gingold | 2019-05-06 | 1 | -1/+1 |
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| * | vhdl: move xrefs to vhdl child package. | Tristan Gingold | 2019-05-06 | 1 | -1/+1 |
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| * | vhdl: move elocations* packages to vhdl children. | Tristan Gingold | 2019-05-05 | 1 | -1/+1 |
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| * | vhdl: move parse package as vhdl child. | Tristan Gingold | 2019-05-04 | 1 | -0/+9871 |
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index : iCE40/ghdl | |
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