From a972d7cc04e1a7b996a513a6a2e521b770651157 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Mon, 19 Dec 2016 08:22:10 +0100
Subject: test perf02: reduce verbosity.

---
 testsuite/gna/perf02/tb.vhd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/testsuite/gna/perf02/tb.vhd b/testsuite/gna/perf02/tb.vhd
index e79a1d842..135b2612c 100644
--- a/testsuite/gna/perf02/tb.vhd
+++ b/testsuite/gna/perf02/tb.vhd
@@ -148,7 +148,7 @@ begin
 
 			clock_counter <= clock_counter + 1;
 
-			if simu_disp_cycles = '1' then
+			if false and simu_disp_cycles = '1' then
 				-- Write simulation message
 				write(l, string'("INFO clock cycle "));
 				write(l, clock_counter);
-- 
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