From 6a694dd839a18cdf0382753fffc17aa1fbd41f9d Mon Sep 17 00:00:00 2001
From: umarcor <unai.martinezcorral@ehu.eus>
Date: Mon, 7 Feb 2022 19:28:23 +0100
Subject: doc: use extlinks more

---
 doc/quick_start/simulation/adder/index.rst | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'doc/quick_start/simulation/adder')

diff --git a/doc/quick_start/simulation/adder/index.rst b/doc/quick_start/simulation/adder/index.rst
index 5ff607801..693d42ef3 100644
--- a/doc/quick_start/simulation/adder/index.rst
+++ b/doc/quick_start/simulation/adder/index.rst
@@ -5,8 +5,8 @@
 =================================
 
 Unlike :ref:`Heartbeat <QuickStart:heartbeat>`, the target hardware design in this example is written using the
-synthesisable subset of `VHDL`. It is a `full adder <https://en.wikipedia.org/wiki/Adder_(electronics)#Full_adder>`_
-described in a file named :file:`adder.vhdl`:
+synthesisable subset of `VHDL`. It is a :wikipedia:`full adder <Adder_(electronics)#Full_adder>` described in a file
+named :file:`adder.vhdl`:
 
 .. literalinclude:: adder.vhdl
    :language: vhdl
-- 
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