From 688173587e76ee89b67b0c0aeb93385c0db08b22 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Thu, 4 Jul 2019 18:20:30 +0200 Subject: vhdl: rename Cover_Statement to Cover_Directive. --- python/libghdl/thin/vhdl/nodes.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'python') diff --git a/python/libghdl/thin/vhdl/nodes.py b/python/libghdl/thin/vhdl/nodes.py index 90e0339cf..101e6500b 100644 --- a/python/libghdl/thin/vhdl/nodes.py +++ b/python/libghdl/thin/vhdl/nodes.py @@ -268,7 +268,7 @@ class Iir_Kind: Concurrent_Assertion_Statement = 183 Concurrent_Procedure_Call_Statement = 184 Psl_Assert_Statement = 185 - Psl_Cover_Statement = 186 + Psl_Cover_Directive = 186 Psl_Restrict_Directive = 187 >>>>>>> vhdl: parse and analyze restrict directive. Block_Statement = 188 @@ -528,7 +528,7 @@ class Iir_Kinds: Iir_Kind.Concurrent_Assertion_Statement, Iir_Kind.Concurrent_Procedure_Call_Statement, Iir_Kind.Psl_Assert_Statement, - Iir_Kind.Psl_Cover_Statement, + Iir_Kind.Psl_Cover_Directive, Iir_Kind.Psl_Restrict_Directive] Non_Alias_Object_Declaration = [ @@ -720,7 +720,7 @@ class Iir_Kinds: Iir_Kind.Concurrent_Assertion_Statement, Iir_Kind.Concurrent_Procedure_Call_Statement, Iir_Kind.Psl_Assert_Statement, - Iir_Kind.Psl_Cover_Statement, + Iir_Kind.Psl_Cover_Directive, Iir_Kind.Psl_Restrict_Directive, Iir_Kind.Block_Statement, Iir_Kind.If_Generate_Statement, -- cgit v1.2.3