From 00ca739542639e5de0578bf1e62f04e380772f52 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sun, 21 Aug 2022 14:10:08 +0200
Subject: synth: factorize code for synth_subtype_conversion

---
 src/synth/elab-vhdl_expr.adb | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

(limited to 'src/synth/elab-vhdl_expr.adb')

diff --git a/src/synth/elab-vhdl_expr.adb b/src/synth/elab-vhdl_expr.adb
index d1b44fe78..391a75c92 100644
--- a/src/synth/elab-vhdl_expr.adb
+++ b/src/synth/elab-vhdl_expr.adb
@@ -20,7 +20,7 @@ with Types; use Types;
 with Name_Table;
 with Str_Table;
 
-with Netlists.Builders;
+with Netlists;
 
 with Vhdl.Errors; use Vhdl.Errors;
 with Vhdl.Utils; use Vhdl.Utils;
@@ -101,8 +101,7 @@ package body Elab.Vhdl_Expr is
                                      Bounds : Boolean;
                                      Loc : Node) return Valtyp is
    begin
-      return Synth_Subtype_Conversion
-        (Netlists.Builders.No_Context, Vt, Dtype, Bounds, Loc);
+      return Synth_Subtype_Conversion (null, Vt, Dtype, Bounds, Loc);
    end Exec_Subtype_Conversion;
 
    function Exec_Value_Attribute (Syn_Inst : Synth_Instance_Acc; Attr : Node)
-- 
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