From ace70f3cc4d5ac8d5fb7e02e96d5b3187319e520 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sat, 13 Feb 2016 18:00:36 +0100
Subject: psl: cover directive works on a sequence, not on a property.

---
 src/vhdl/simulate/simulation.adb | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'src/vhdl/simulate/simulation.adb')

diff --git a/src/vhdl/simulate/simulation.adb b/src/vhdl/simulate/simulation.adb
index b02d47dd2..c33997b7d 100644
--- a/src/vhdl/simulate/simulation.adb
+++ b/src/vhdl/simulate/simulation.adb
@@ -1112,6 +1112,9 @@ package body Simulation is
       Release (Marker, Expr_Pool);
       if V then
          Nvec := (others => False);
+         if Get_Kind (E.Stmt) = Iir_Kind_Psl_Cover_Statement then
+            Nvec (0) := True;
+         end if;
 
          --  For each state: if set, evaluate all outgoing edges.
          NFA := Get_PSL_NFA (E.Stmt);
-- 
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