From 8d5ae7bf63c616925306b42d42d01d1cebf3ffc7 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Mon, 21 Sep 2020 07:54:03 +0200
Subject: testsuite/gna: add a test for #1469

---
 testsuite/gna/issue1469/ent.vhdl     | 15 +++++++++++++++
 testsuite/gna/issue1469/ent1.vhdl    | 16 ++++++++++++++++
 testsuite/gna/issue1469/testsuite.sh | 13 +++++++++++++
 3 files changed, 44 insertions(+)
 create mode 100644 testsuite/gna/issue1469/ent.vhdl
 create mode 100644 testsuite/gna/issue1469/ent1.vhdl
 create mode 100755 testsuite/gna/issue1469/testsuite.sh

(limited to 'testsuite/gna')

diff --git a/testsuite/gna/issue1469/ent.vhdl b/testsuite/gna/issue1469/ent.vhdl
new file mode 100644
index 000000000..7cdbd1e18
--- /dev/null
+++ b/testsuite/gna/issue1469/ent.vhdl
@@ -0,0 +1,15 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity ent is
+end;
+
+architecture arch of ent is
+
+    procedure f(a : std_logic_vector(open)) is
+    begin
+        a(a'high) <= a-1;
+    end procedure;
+
+begin
+end;
diff --git a/testsuite/gna/issue1469/ent1.vhdl b/testsuite/gna/issue1469/ent1.vhdl
new file mode 100644
index 000000000..15fd607ab
--- /dev/null
+++ b/testsuite/gna/issue1469/ent1.vhdl
@@ -0,0 +1,16 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity ent1 is
+end;
+
+architecture arch of ent1 is
+
+    procedure f(a : std_logic_vector(open)) is
+    begin
+      report "a(a'high)=" & std_logic'image(a(a'high));
+    end procedure;
+
+begin
+  f ("0110");
+end;
diff --git a/testsuite/gna/issue1469/testsuite.sh b/testsuite/gna/issue1469/testsuite.sh
new file mode 100755
index 000000000..e984c9244
--- /dev/null
+++ b/testsuite/gna/issue1469/testsuite.sh
@@ -0,0 +1,13 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze_failure ent.vhdl
+
+analyze ent1.vhdl
+elab_simulate ent1
+
+clean
+
+echo "Test successful"
-- 
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