From 1a65ac6bbbaf6cdaf1ea93c0c46f2e97e12e9dcc Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sat, 9 May 2020 11:02:23 +0200
Subject: testsuite/synth: add case tests for corner case.

---
 testsuite/synth/case01/tb_case03.vhdl | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)
 create mode 100644 testsuite/synth/case01/tb_case03.vhdl

(limited to 'testsuite/synth/case01/tb_case03.vhdl')

diff --git a/testsuite/synth/case01/tb_case03.vhdl b/testsuite/synth/case01/tb_case03.vhdl
new file mode 100644
index 000000000..7706b77c5
--- /dev/null
+++ b/testsuite/synth/case01/tb_case03.vhdl
@@ -0,0 +1,27 @@
+entity tb_case03 is
+end tb_case03;
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+architecture behav of tb_case03 is
+  signal s : std_logic_vector (4 downto 0);
+  signal o : std_logic;
+begin
+  dut: entity work.case03
+    port map (s, o);
+
+  process
+  begin
+    s <= "10011";
+    wait for 1 ns;
+    assert o = '0' severity failure;
+
+    s <= "00000";
+    wait for 1 ns;
+    assert o = '0' severity failure;
+
+    wait;
+  end process;
+end behav;
-- 
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