From 52a9954e29fe72ed5c90f696bc8a600b22089dea Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sat, 25 Jan 2020 08:25:43 +0100
Subject: testsuite/synth: add test for #1113

---
 testsuite/synth/issue1113/memory_depth_one.vhdl | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 testsuite/synth/issue1113/memory_depth_one.vhdl

(limited to 'testsuite/synth/issue1113/memory_depth_one.vhdl')

diff --git a/testsuite/synth/issue1113/memory_depth_one.vhdl b/testsuite/synth/issue1113/memory_depth_one.vhdl
new file mode 100644
index 000000000..36152c63a
--- /dev/null
+++ b/testsuite/synth/issue1113/memory_depth_one.vhdl
@@ -0,0 +1,16 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity memory_depth_one is
+  port (
+    address: in unsigned(0 downto 0);
+    output: out std_logic
+    );
+end entity;
+
+architecture arch of memory_depth_one is
+  constant store: std_logic_vector(0 downto 0) := "0";
+begin
+  output <= store(to_integer(address));
+end arch;
-- 
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