From 33043febf136c4d1096b83885ec5823b8c2bb843 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Fri, 8 Apr 2022 08:25:07 +0200 Subject: testsuite/synth: add a test for #2025 --- testsuite/synth/issue2025/testsuite.sh | 7 +++++++ testsuite/synth/issue2025/wb_standard_axi4_lite_bridge.psl | 4 ++++ testsuite/synth/issue2025/wb_standard_axi4_lite_bridge_rtl.vhd | 7 +++++++ testsuite/synth/issue2025/wb_standard_formal_psl.vhd | 9 +++++++++ 4 files changed, 27 insertions(+) create mode 100755 testsuite/synth/issue2025/testsuite.sh create mode 100644 testsuite/synth/issue2025/wb_standard_axi4_lite_bridge.psl create mode 100644 testsuite/synth/issue2025/wb_standard_axi4_lite_bridge_rtl.vhd create mode 100644 testsuite/synth/issue2025/wb_standard_formal_psl.vhd (limited to 'testsuite/synth/issue2025') diff --git a/testsuite/synth/issue2025/testsuite.sh b/testsuite/synth/issue2025/testsuite.sh new file mode 100755 index 000000000..d567f2581 --- /dev/null +++ b/testsuite/synth/issue2025/testsuite.sh @@ -0,0 +1,7 @@ +#! /bin/sh + +. ../../testenv.sh + +synth --std=08 wb_standard_axi4_lite_bridge_rtl.vhd wb_standard_axi4_lite_bridge.psl wb_standard_formal_psl.vhd -e wb_standard_axi4_lite_bridge > syn_bridge.vhdl + +echo "Test successful" diff --git a/testsuite/synth/issue2025/wb_standard_axi4_lite_bridge.psl b/testsuite/synth/issue2025/wb_standard_axi4_lite_bridge.psl new file mode 100644 index 000000000..12c419e08 --- /dev/null +++ b/testsuite/synth/issue2025/wb_standard_axi4_lite_bridge.psl @@ -0,0 +1,4 @@ + +VUNIT wb_standard_axi4_lite_bridge_formal (wb_standard_axi4_lite_bridge) { + u_wb3_classic_formal: ENTITY work.wb_standard_formal(psl); +} diff --git a/testsuite/synth/issue2025/wb_standard_axi4_lite_bridge_rtl.vhd b/testsuite/synth/issue2025/wb_standard_axi4_lite_bridge_rtl.vhd new file mode 100644 index 000000000..035981936 --- /dev/null +++ b/testsuite/synth/issue2025/wb_standard_axi4_lite_bridge_rtl.vhd @@ -0,0 +1,7 @@ + +ENTITY wb_standard_axi4_lite_bridge IS +END ENTITY wb_standard_axi4_lite_bridge; + +ARCHITECTURE rtl OF wb_standard_axi4_lite_bridge IS +BEGIN +END ARCHITECTURE rtl; diff --git a/testsuite/synth/issue2025/wb_standard_formal_psl.vhd b/testsuite/synth/issue2025/wb_standard_formal_psl.vhd new file mode 100644 index 000000000..349b6168b --- /dev/null +++ b/testsuite/synth/issue2025/wb_standard_formal_psl.vhd @@ -0,0 +1,9 @@ + +ENTITY wb_standard_formal IS +END ENTITY; + +ARCHITECTURE psl of wb_standard_formal IS +BEGIN + gen_test: IF (true) GENERATE + END GENERATE; +END ARCHITECTURE; -- cgit v1.2.3