From 4e4a7bb439596bac36488322cb190afc4efd935b Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Wed, 27 Nov 2019 20:30:37 +0100 Subject: testsuite: add case for #1035 --- testsuite/synth/issue1035/ent.vhdl | 16 ++++++++++++++++ testsuite/synth/issue1035/testsuite.sh | 13 +++++++++++++ 2 files changed, 29 insertions(+) create mode 100644 testsuite/synth/issue1035/ent.vhdl create mode 100755 testsuite/synth/issue1035/testsuite.sh (limited to 'testsuite/synth') diff --git a/testsuite/synth/issue1035/ent.vhdl b/testsuite/synth/issue1035/ent.vhdl new file mode 100644 index 000000000..9c8eb0b4e --- /dev/null +++ b/testsuite/synth/issue1035/ent.vhdl @@ -0,0 +1,16 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity ent is +end ent; + +architecture a of ent is + constant c : std_logic_vector(7 downto 0) := x"00"; +begin + process(all) + begin + case c is + when others => + end case; + end process; +end a; diff --git a/testsuite/synth/issue1035/testsuite.sh b/testsuite/synth/issue1035/testsuite.sh new file mode 100755 index 000000000..730cf6d16 --- /dev/null +++ b/testsuite/synth/issue1035/testsuite.sh @@ -0,0 +1,13 @@ +#! /bin/sh + +. ../../testenv.sh + +GHDL_STD_FLAGS=--std=08 +for t in ent; do + synth $t.vhdl -e $t > syn_$t.vhdl + analyze syn_$t.vhdl +done + +clean + +echo "Test successful" -- cgit v1.2.3