From fafa25a6c0a1365bed4990e26d151e8140797730 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sat, 10 Jan 2015 08:16:19 +0100
Subject: Add testcase from ticket31.

---
 testsuite/gna/ticket31/tb2.vhdl                 | 12 ++++++++++++
 testsuite/gna/ticket31/testsuite.sh             | 13 +++++++++++++
 testsuite/gna/ticket31/top_phystest_simple.vhdl | 22 ++++++++++++++++++++++
 3 files changed, 47 insertions(+)
 create mode 100644 testsuite/gna/ticket31/tb2.vhdl
 create mode 100755 testsuite/gna/ticket31/testsuite.sh
 create mode 100644 testsuite/gna/ticket31/top_phystest_simple.vhdl

(limited to 'testsuite')

diff --git a/testsuite/gna/ticket31/tb2.vhdl b/testsuite/gna/ticket31/tb2.vhdl
new file mode 100644
index 000000000..4b1922067
--- /dev/null
+++ b/testsuite/gna/ticket31/tb2.vhdl
@@ -0,0 +1,12 @@
+entity Tb2 is
+end;
+
+architecture top of Tb2 is
+  function get_m15 return real is
+  begin
+    return -1.5;
+  end get_m15;
+  constant int_2     : INTEGER  := natural(get_m15);
+begin
+  assert FALSE report "17 - int_2 (natural(-1.5)): " & INTEGER'image(int_2) severity note;
+end;
diff --git a/testsuite/gna/ticket31/testsuite.sh b/testsuite/gna/ticket31/testsuite.sh
new file mode 100755
index 000000000..d71d3ef61
--- /dev/null
+++ b/testsuite/gna/ticket31/testsuite.sh
@@ -0,0 +1,13 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+analyze top_phystest_simple.vhdl
+elab_simulate_failure top_physicaltest_simple
+
+analyze tb2.vhdl
+elab_simulate_failure tb2
+
+clean
+
+echo "Test successful"
diff --git a/testsuite/gna/ticket31/top_phystest_simple.vhdl b/testsuite/gna/ticket31/top_phystest_simple.vhdl
new file mode 100644
index 000000000..fd88e6273
--- /dev/null
+++ b/testsuite/gna/ticket31/top_phystest_simple.vhdl
@@ -0,0 +1,22 @@
+library IEEE;
+use     IEEE.STD_LOGIC_1164.ALL;
+--use     IEEE.MATH_REAL.all;
+
+entity Top_PhysicalTest_Simple is
+  port (
+    Clock : in STD_LOGIC;
+    Input : in STD_LOGIC;
+    Output : out STD_LOGIC
+  );
+end;
+
+architecture top of Top_PhysicalTest_Simple is
+  constant int_1     : INTEGER  := natural(1.5);
+  -- constant int_2     : INTEGER  := integer(-1.5);
+  constant int_2     : INTEGER  := natural(-1.5);
+begin
+  assert FALSE report "16 - int_1 (natural(1.5)):  " & INTEGER'image(int_1) severity note;
+  assert FALSE report "17 - int_2 (natural(-1.5)): " & INTEGER'image(int_2) severity note;
+
+  Output <= Input when rising_edge(Clock);
+end;
-- 
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