| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Remove seperate 5k RAM DB and share with 8k instead | David Shah | 2018-01-16 | 1 | -2/+2 |
| | | | | | | This should ensure that the 5k RAM routing entries are now complete, fixing #115 | ||||
| * | Create icefuzz scripts for DSP and 5k | David Shah | 2017-11-17 | 1 | -14/+13 |
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| * | Preparations for DSP and IpCon fuzzing | David Shah | 2017-11-08 | 1 | -1/+17 |
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| * | Share glb_netwk data between 5k and 8k parts | David Shah | 2017-10-29 | 1 | -4/+0 |
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| * | Add ColBufCtrl bits to database for 5k parts | David Shah | 2017-10-25 | 1 | -0/+4 |
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| * | Remove extra IoCtrl cf_bit_ and extra_padeb_test_ lines from database | Clifford Wolf | 2017-07-31 | 1 | -0/+3 |
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| * | More work figuring out values in icebox.py | Scott Shawcroft | 2017-06-23 | 1 | -2/+2 |
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| * | Add icefuzz support for the UP5K and rework underlying device specification ↵ | Scott Shawcroft | 2017-06-22 | 1 | -7/+9 |
| | | | | | for more flexibility. | ||||
| * | Disable propagation of LP384 ieren bits into iceboxdb.py | Clifford Wolf | 2017-03-11 | 1 | -1/+8 |
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| * | Fuzzed RamCascade bits | Clifford Wolf | 2016-01-09 | 1 | -1/+5 |
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| * | Added lutff_i/lout net to model | Clifford Wolf | 2015-12-04 | 1 | -1/+1 |
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| * | Added 1k timings | Clifford Wolf | 2015-09-27 | 1 | -6/+3 |
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| * | icefuzz: python 3 | Clifford Wolf | 2015-08-22 | 1 | -4/+2 |
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| * | Replaced calls to "python" with "python2" | Clifford Wolf | 2015-07-30 | 1 | -1/+1 |
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| * | Imported full dev sources | Clifford Wolf | 2015-07-18 | 1 | -0/+140 |
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index : iCE40/icestorm | |
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