From 81e0d3c361e1b639064e07ff7efd1b8232090e0c Mon Sep 17 00:00:00 2001 From: David Shah Date: Mon, 23 Oct 2017 17:48:22 +0100 Subject: Add some verilog tests for analysing up5k features --- icefuzz/tests/sb_rgba_drv.v | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 icefuzz/tests/sb_rgba_drv.v (limited to 'icefuzz/tests/sb_rgba_drv.v') diff --git a/icefuzz/tests/sb_rgba_drv.v b/icefuzz/tests/sb_rgba_drv.v new file mode 100644 index 0000000..e5a0c36 --- /dev/null +++ b/icefuzz/tests/sb_rgba_drv.v @@ -0,0 +1,32 @@ +module top( + input r_in, + input g_in, + input b_in, + output r_led, + output g_led, + output b_led); + + wire curren; + wire rgbleden; + + SB_RGBA_DRV RGBA_DRIVER ( + .CURREN(curren), + .RGBLEDEN(rgbleden), + .RGB0PWM(r_in), + .RGB1PWM(r_in), + .RGB2PWM(r_in), + .RGB0(r_led), + .RGB1(g_led), + .RGB2(b_led) + ); + +defparam RGBA_DRIVER.CURRENT_MODE = "0b0"; +defparam RGBA_DRIVER.RGB0_CURRENT = "0b000011"; +defparam RGBA_DRIVER.RGB1_CURRENT = "0b001111"; +defparam RGBA_DRIVER.RGB2_CURRENT = "0b111111"; + +assign curren = 1'b1; +assign rgbleden = 1'b1; + + +endmodule \ No newline at end of file -- cgit v1.2.3