diff options
Diffstat (limited to 'ice40/regressions/issue0148/hdl/cpu/isa.txt')
| -rw-r--r-- | ice40/regressions/issue0148/hdl/cpu/isa.txt | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/ice40/regressions/issue0148/hdl/cpu/isa.txt b/ice40/regressions/issue0148/hdl/cpu/isa.txt new file mode 100644 index 0000000..225a53b --- /dev/null +++ b/ice40/regressions/issue0148/hdl/cpu/isa.txt @@ -0,0 +1,66 @@ + +Basic Instructions Assembly Syntax Operation +--------------------- -------------------- ----------------------------- +iiii iiii aaaa 0000 mov Ra, si8 Ra = si8 +iiii iiii aaaa 0001 mhi Ra, si8 Ra = (Ra & 0xFF) | (si8 << 8) +ffff bbbb aaaa 0010 alu Ra, Ra, Rb Ra = Ra <fn> Rb +iiii ffff aaaa 0011 alu Ra, Ra, si4 Ra = Ra <fn> si4 +ffff bbbb aaaa 01cc alu Rc, Ra, Rb Rc = Ra <fn> Rb +iiii bbbb aaaa 1000 lw Ra, [Rb, si4] Ra = [Rb + si4] +iiii bbbb aaaa 1001 sw Ra, [Rb, si4] [Rb + si4] = Ra +iiii iiii aaaa 1010 bnz Ra, si8 if (Ra != 0) PC += si8 +iiii iiii aaaa 1011 bz Ra, si8 if (Ra == 0) PC += si8 +iiii iiii iiii 1100 b si12 PC += si12 +iiii iiii iiii 1101 bl si12 R14 = PC, PC += si12, +0000 bbbb xxxx 1110 b Rb PC = Rb +0001 bbbb xxxx 1110 bl Rb R14 = PC, PC = Rb +0010 0000 0000 1110 nop +0010 nnnn aaaa 1110 debug Ra, x4 DEBUG(Ra, n4) + +Extended Instructions <--- Not implemented yet. +--------------------- Will likely change during +0011 xxxx xxxx 1110 iret implementation. +0100 nnnn aaaa 1110 mov Ra, Sn +0101 nnnn aaaa 1110 mov Sn, Ra +0110 aaaa bbbb 1110 mov Ra', Rb +0111 aaaa bbbb 1110 mov Ra, Rb' +1xxx xxxx xxxx 1110 undefined +nnnn nnnn 0000 1111 syscall n +nnnn nnnn 0001 1111 break; +nnnn nnnn 0010 1111 set <flags> +nnnn nnnn 0011 1111 clr <flags> +xxxx xxxx 0011 1111 undefined +xxxx xxxx 01xx 1111 undefined +xxxx xxxx 1xxx 1111 undefined + +ALU Functions (<fn>) Key +-------------------------------------- ---------------------------------- +0000 mov r = b si4 signed 4bit immediate +0001 and r = a & b si8 signed 8bit immediate +0010 orr r = a | b si12 signed 12bit immediate +0011 xor r = a ^ b fn ALU function +0100 add r = a + b R0-R15 general purpose registers +0101 sub r = a - b PC program counter +0110 mul r = a * b +0111 mhi r = (b << 8) | (a & 0xFF) S0-S15 system control registers +1000 slt r = a < b F0-F7 system flag bits +1001 sle r = a <= b R0'-R15' banked registers +1010 shr r = a >> 1 +1011 shl r = a << 1 +1100 bis r = a | (1 << b[3:0]) +1101 bic r = a & (~(1 << b[3:0])) +1110 tbs r = a & (1 << b[3:0]) +1111 bit r = 1 << b[3:0] + +Register Usage / Procedure Call Standard +----------------------------------------- +R0 - R3 parameters & results +R4 - R11 caller save, working variables +R12 reserved for OS/runtime global use +R13 stack pointer +R14 link register* (for branch-and-link) +R15 scratch (for assembler/linker use) + +* The processor can *only* save PC to R14 on BL calls. + All other register assignements are merely to simplify + software interworking, not required by the architecture. |