diff options
| -rw-r--r-- | CMakeLists.txt | 11 | ||||
| -rw-r--r-- | common/timing.cc | 2 | ||||
| -rw-r--r-- | ecp5/arch.cc | 52 | ||||
| -rw-r--r-- | ecp5/arch.h | 2 | ||||
| -rw-r--r-- | ecp5/family.cmake | 137 | ||||
| -rw-r--r-- | ice40/arch.cc | 31 | ||||
| -rw-r--r-- | ice40/arch.h | 2 | ||||
| -rw-r--r-- | ice40/family.cmake | 162 |
8 files changed, 244 insertions, 155 deletions
diff --git a/CMakeLists.txt b/CMakeLists.txt index 33a703d5..4f29d132 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -7,6 +7,7 @@ option(BUILD_PYTHON "Build Python Integration" ON) option(BUILD_TESTS "Build GUI" OFF) option(COVERAGE "Add code coverage info" OFF) option(STATIC_BUILD "Create static build" OFF) +option(EXTERNAL_CHIPDB "Create build with pre-built chipdb binaries" OFF) set(link_param "") if (STATIC_BUILD) @@ -16,6 +17,14 @@ if (STATIC_BUILD) endif() endif() +if (EXTERNAL_CHIPDB) + if (NOT DEFINED EXTERNAL_CHIPDB_ROOT) + message(STATUS "EXTERNAL_CHIPDB_ROOT not defined using -DEXTERNAL_CHIPDB_ROOT=/path/to/nextpnr. Default to /usr/share/nextpnr") + set(EXTERNAL_CHIPDB_ROOT "/usr/share/nextpnr") + endif() + add_definitions("-DEXTERNAL_CHIPDB_ROOT=\"${EXTERNAL_CHIPDB_ROOT}\"") +endif() + # List of families to build set(FAMILIES generic ice40 ecp5) @@ -66,7 +75,7 @@ endif() find_package(Sanitizers) # List of Boost libraries to include -set(boost_libs filesystem thread program_options) +set(boost_libs filesystem thread program_options iostreams) if (BUILD_GUI AND NOT BUILD_PYTHON) message(FATAL_ERROR "GUI requires Python to build") diff --git a/common/timing.cc b/common/timing.cc index 8a48b761..64dcdf71 100644 --- a/common/timing.cc +++ b/common/timing.cc @@ -930,7 +930,7 @@ void timing_analysis(Context *ctx, bool print_histogram, bool print_fmax, bool p unsigned bar_width = 60; auto min_slack = slack_histogram.begin()->first; auto max_slack = slack_histogram.rbegin()->first; - auto bin_size = std::max<unsigned>(1, ceil((max_slack - min_slack) / float(num_bins))); + auto bin_size = std::max<unsigned>(1, ceil((max_slack - min_slack + 1) / float(num_bins))); std::vector<unsigned> bins(num_bins); unsigned max_freq = 0; for (const auto &i : slack_histogram) { diff --git a/ecp5/arch.cc b/ecp5/arch.cc index a2036033..23cdea3b 100644 --- a/ecp5/arch.cc +++ b/ecp5/arch.cc @@ -19,6 +19,7 @@ */ #include <algorithm> +#include <boost/iostreams/device/mapped_file.hpp> #include <boost/range/adaptor/reversed.hpp> #include <cmath> #include <cstring> @@ -63,11 +64,37 @@ static const ChipInfoPOD *get_chip_info(const RelPtr<ChipInfoPOD> *ptr) { return void load_chipdb(); #endif +#if defined(EXTERNAL_CHIPDB_ROOT) +const char *chipdb_blob_25k = nullptr; +const char *chipdb_blob_45k = nullptr; +const char *chipdb_blob_85k = nullptr; + +boost::iostreams::mapped_file_source blob_files[3]; + +const char *mmap_file(int index, const char *filename) +{ + try { + blob_files[index].open(filename); + if (!blob_files[index].is_open()) + log_error("Unable to read chipdb %s\n", filename); + return (const char *)blob_files[index].data(); + } catch (...) { + log_error("Unable to read chipdb %s\n", filename); + } +} + +void load_chipdb() +{ + chipdb_blob_25k = mmap_file(0, EXTERNAL_CHIPDB_ROOT "/ecp5/chipdb-25k.bin"); + chipdb_blob_45k = mmap_file(1, EXTERNAL_CHIPDB_ROOT "/ecp5/chipdb-45k.bin"); + chipdb_blob_85k = mmap_file(2, EXTERNAL_CHIPDB_ROOT "/ecp5/chipdb-85k.bin"); +} +#endif //#define LFE5U_45F_ONLY Arch::Arch(ArchArgs args) : args(args) { -#if defined(_MSC_VER) +#if defined(_MSC_VER) || defined(EXTERNAL_CHIPDB_ROOT) load_chipdb(); #endif #ifdef LFE5U_45F_ONLY @@ -400,7 +427,28 @@ BelId Arch::getBelByLocation(Loc loc) const delay_t Arch::estimateDelay(WireId src, WireId dst) const { - return (240 - 20 * args.speed) * (abs(src.location.x - dst.location.x) + abs(src.location.y - dst.location.y)); + auto est_location = [&](WireId w) -> std::pair<int16_t, int16_t> { + if (w.location.x == 0 && w.location.y == 0) { + // Global wires + const auto &wire = locInfo(w)->wire_data[w.index]; + // Use location of first downhill bel or pip, if available + if (wire.num_bel_pins > 0) { + return std::make_pair(wire.bel_pins[0].rel_bel_loc.x, wire.bel_pins[0].rel_bel_loc.y); + } else if (wire.num_downhill > 0) { + return std::make_pair(wire.pips_downhill[0].rel_loc.x, wire.pips_downhill[0].rel_loc.y); + } else if (wire.num_uphill > 0) { + return std::make_pair(wire.pips_uphill[0].rel_loc.x, wire.pips_uphill[0].rel_loc.y); + } else { + return std::make_pair<int16_t, int16_t>(0, 0); + } + } else { + return std::make_pair(w.location.x, w.location.y); + } + }; + + auto src_loc = est_location(src), dst_loc = est_location(dst); + + return (240 - 20 * args.speed) * (abs(src_loc.first - dst_loc.first) + abs(src_loc.second - dst_loc.second)); } delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const diff --git a/ecp5/arch.h b/ecp5/arch.h index 4f2aaaa9..713c320e 100644 --- a/ecp5/arch.h +++ b/ecp5/arch.h @@ -204,7 +204,7 @@ NPNR_PACKED_STRUCT(struct ChipInfoPOD { RelPtr<SpeedGradePOD> speed_grades; }); -#if defined(_MSC_VER) +#if defined(_MSC_VER) || defined(EXTERNAL_CHIPDB_ROOT) extern const char *chipdb_blob_25k; extern const char *chipdb_blob_45k; extern const char *chipdb_blob_85k; diff --git a/ecp5/family.cmake b/ecp5/family.cmake index 1d9b4532..799851b2 100644 --- a/ecp5/family.cmake +++ b/ecp5/family.cmake @@ -1,77 +1,78 @@ +if (NOT EXTERNAL_CHIPDB) + set(devices 25k 45k 85k) -set(devices 25k 45k 85k) + if (NOT DEFINED TRELLIS_ROOT) + message(STATUS "TRELLIS_ROOT not defined using -DTRELLIS_ROOT=/path/to/prjtrellis. Default to /usr/local/share/trellis") + set(TRELLIS_ROOT "/usr/local/share/trellis") + endif() -if (NOT DEFINED TRELLIS_ROOT) - message(STATUS "TRELLIS_ROOT not defined using -DTRELLIS_ROOT=/path/to/prjtrellis. Default to /usr/local/share/trellis") - set(TRELLIS_ROOT "/usr/local/share/trellis") -endif() - -file(GLOB found_pytrellis ${TRELLIS_ROOT}/libtrellis/pytrellis.* - /usr/lib/pytrellis.* - /usr/lib64/pytrellis.* - /usr/lib/trellis/pytrellis.* - /usr/lib64/trellis/pytrellis.*) + file(GLOB found_pytrellis ${TRELLIS_ROOT}/libtrellis/pytrellis.* + /usr/lib/pytrellis.* + /usr/lib64/pytrellis.* + /usr/lib/trellis/pytrellis.* + /usr/lib64/trellis/pytrellis.*) -if ("${found_pytrellis}" STREQUAL "") - message(FATAL_ERROR "failed to locate pytrellis library!") -endif() + if ("${found_pytrellis}" STREQUAL "") + message(FATAL_ERROR "failed to locate pytrellis library!") + endif() -list(GET found_pytrellis 0 PYTRELLIS_LIB) -get_filename_component(PYTRELLIS_LIBDIR ${PYTRELLIS_LIB} DIRECTORY) + list(GET found_pytrellis 0 PYTRELLIS_LIB) + get_filename_component(PYTRELLIS_LIBDIR ${PYTRELLIS_LIB} DIRECTORY) -set(DB_PY ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/trellis_import.py) + set(DB_PY ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/trellis_import.py) -file(MAKE_DIRECTORY ecp5/chipdbs/) -add_library(ecp5_chipdb OBJECT ecp5/chipdbs/) -target_compile_definitions(ecp5_chipdb PRIVATE NEXTPNR_NAMESPACE=nextpnr_${family}) -target_include_directories(ecp5_chipdb PRIVATE ${family}/) + file(MAKE_DIRECTORY ecp5/chipdbs/) + add_library(ecp5_chipdb OBJECT ecp5/chipdbs/) + target_compile_definitions(ecp5_chipdb PRIVATE NEXTPNR_NAMESPACE=nextpnr_${family}) + target_include_directories(ecp5_chipdb PRIVATE ${family}/) -if (CMAKE_HOST_WIN32) -set(ENV_CMD ${CMAKE_COMMAND} -E env "PYTHONPATH=\"${PYTRELLIS_LIBDIR}\;${TRELLIS_ROOT}/util/common\;${TRELLIS_ROOT}/timing/util\"") -else() -set(ENV_CMD ${CMAKE_COMMAND} -E env "PYTHONPATH=${PYTRELLIS_LIBDIR}\:${TRELLIS_ROOT}/util/common:${TRELLIS_ROOT}/timing/util") -endif() + if (CMAKE_HOST_WIN32) + set(ENV_CMD ${CMAKE_COMMAND} -E env "PYTHONPATH=\"${PYTRELLIS_LIBDIR}\;${TRELLIS_ROOT}/util/common\;${TRELLIS_ROOT}/timing/util\"") + else() + set(ENV_CMD ${CMAKE_COMMAND} -E env "PYTHONPATH=${PYTRELLIS_LIBDIR}\:${TRELLIS_ROOT}/util/common:${TRELLIS_ROOT}/timing/util") + endif() -if (MSVC) - target_sources(ecp5_chipdb PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/resource/embed.cc) - set_source_files_properties(${CMAKE_CURRENT_SOURCE_DIR}/ecp5/resources/chipdb.rc PROPERTIES LANGUAGE RC) - foreach (dev ${devices}) - set(DEV_CC_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.bin) - set(DEV_CC_BBA_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.bba) - set(DEV_CONSTIDS_INC ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/constids.inc) - add_custom_command(OUTPUT ${DEV_CC_BBA_DB} - COMMAND ${ENV_CMD} python3 ${DB_PY} -p ${DEV_CONSTIDS_INC} ${dev} > ${DEV_CC_BBA_DB} - DEPENDS ${DB_PY} - ) - add_custom_command(OUTPUT ${DEV_CC_DB} - COMMAND bbasm ${DEV_CC_BBA_DB} ${DEV_CC_DB} - DEPENDS bbasm ${DEV_CC_BBA_DB} - ) - target_sources(ecp5_chipdb PRIVATE ${DEV_CC_DB}) - set_source_files_properties(${DEV_CC_DB} PROPERTIES HEADER_FILE_ONLY TRUE) - foreach (target ${family_targets}) - target_sources(${target} PRIVATE $<TARGET_OBJECTS:ecp5_chipdb> ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/resource/chipdb.rc) - endforeach (target) - endforeach (dev) -else() - target_compile_options(ecp5_chipdb PRIVATE -g0 -O0 -w) - foreach (dev ${devices}) - set(DEV_CC_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.cc) - set(DEV_CC_BBA_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.bba) - set(DEV_CONSTIDS_INC ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/constids.inc) - add_custom_command(OUTPUT ${DEV_CC_BBA_DB} - COMMAND ${ENV_CMD} python3 ${DB_PY} -p ${DEV_CONSTIDS_INC} ${dev} > ${DEV_CC_BBA_DB}.new - COMMAND mv ${DEV_CC_BBA_DB}.new ${DEV_CC_BBA_DB} - DEPENDS ${DB_PY} - ) - add_custom_command(OUTPUT ${DEV_CC_DB} - COMMAND bbasm --c ${DEV_CC_BBA_DB} ${DEV_CC_DB}.new - COMMAND mv ${DEV_CC_DB}.new ${DEV_CC_DB} - DEPENDS bbasm ${DEV_CC_BBA_DB} - ) - target_sources(ecp5_chipdb PRIVATE ${DEV_CC_DB}) - foreach (target ${family_targets}) - target_sources(${target} PRIVATE $<TARGET_OBJECTS:ecp5_chipdb>) - endforeach (target) - endforeach (dev) + if (MSVC) + target_sources(ecp5_chipdb PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/resource/embed.cc) + set_source_files_properties(${CMAKE_CURRENT_SOURCE_DIR}/ecp5/resources/chipdb.rc PROPERTIES LANGUAGE RC) + foreach (dev ${devices}) + set(DEV_CC_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.bin) + set(DEV_CC_BBA_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.bba) + set(DEV_CONSTIDS_INC ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/constids.inc) + add_custom_command(OUTPUT ${DEV_CC_BBA_DB} + COMMAND ${ENV_CMD} python3 ${DB_PY} -p ${DEV_CONSTIDS_INC} ${dev} > ${DEV_CC_BBA_DB} + DEPENDS ${DB_PY} + ) + add_custom_command(OUTPUT ${DEV_CC_DB} + COMMAND bbasm ${DEV_CC_BBA_DB} ${DEV_CC_DB} + DEPENDS bbasm ${DEV_CC_BBA_DB} + ) + target_sources(ecp5_chipdb PRIVATE ${DEV_CC_DB}) + set_source_files_properties(${DEV_CC_DB} PROPERTIES HEADER_FILE_ONLY TRUE) + foreach (target ${family_targets}) + target_sources(${target} PRIVATE $<TARGET_OBJECTS:ecp5_chipdb> ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/resource/chipdb.rc) + endforeach (target) + endforeach (dev) + else() + target_compile_options(ecp5_chipdb PRIVATE -g0 -O0 -w) + foreach (dev ${devices}) + set(DEV_CC_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.cc) + set(DEV_CC_BBA_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.bba) + set(DEV_CONSTIDS_INC ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/constids.inc) + add_custom_command(OUTPUT ${DEV_CC_BBA_DB} + COMMAND ${ENV_CMD} python3 ${DB_PY} -p ${DEV_CONSTIDS_INC} ${dev} > ${DEV_CC_BBA_DB}.new + COMMAND mv ${DEV_CC_BBA_DB}.new ${DEV_CC_BBA_DB} + DEPENDS ${DB_PY} + ) + add_custom_command(OUTPUT ${DEV_CC_DB} + COMMAND bbasm --c ${DEV_CC_BBA_DB} ${DEV_CC_DB}.new + COMMAND mv ${DEV_CC_DB}.new ${DEV_CC_DB} + DEPENDS bbasm ${DEV_CC_BBA_DB} + ) + target_sources(ecp5_chipdb PRIVATE ${DEV_CC_DB}) + foreach (target ${family_targets}) + target_sources(${target} PRIVATE $<TARGET_OBJECTS:ecp5_chipdb>) + endforeach (target) + endforeach (dev) + endif() endif() diff --git a/ice40/arch.cc b/ice40/arch.cc index f6084e72..23a2130c 100644 --- a/ice40/arch.cc +++ b/ice40/arch.cc @@ -19,6 +19,7 @@ */ #include <algorithm> +#include <boost/iostreams/device/mapped_file.hpp> #include <cmath> #include "cells.h" #include "gfx.h" @@ -48,9 +49,37 @@ static const ChipInfoPOD *get_chip_info(const RelPtr<ChipInfoPOD> *ptr) { return void load_chipdb(); #endif +#if defined(EXTERNAL_CHIPDB_ROOT) +const char *chipdb_blob_384 = nullptr; +const char *chipdb_blob_1k = nullptr; +const char *chipdb_blob_5k = nullptr; +const char *chipdb_blob_8k = nullptr; + +boost::iostreams::mapped_file_source blob_files[4]; + +const char *mmap_file(int index, const char *filename) +{ + try { + blob_files[index].open(filename); + if (!blob_files[index].is_open()) + log_error("Unable to read chipdb %s\n", filename); + return (const char *)blob_files[index].data(); + } catch (...) { + log_error("Unable to read chipdb %s\n", filename); + } +} + +void load_chipdb() +{ + chipdb_blob_384 = mmap_file(0, EXTERNAL_CHIPDB_ROOT "/ice40/chipdb-384.bin"); + chipdb_blob_1k = mmap_file(1, EXTERNAL_CHIPDB_ROOT "/ice40/chipdb-1k.bin"); + chipdb_blob_5k = mmap_file(2, EXTERNAL_CHIPDB_ROOT "/ice40/chipdb-5k.bin"); + chipdb_blob_8k = mmap_file(3, EXTERNAL_CHIPDB_ROOT "/ice40/chipdb-8k.bin"); +} +#endif Arch::Arch(ArchArgs args) : args(args) { -#if defined(_MSC_VER) +#if defined(_MSC_VER) || defined(EXTERNAL_CHIPDB_ROOT) load_chipdb(); #endif diff --git a/ice40/arch.h b/ice40/arch.h index 2dd6b06c..b25e3aee 100644 --- a/ice40/arch.h +++ b/ice40/arch.h @@ -244,7 +244,7 @@ NPNR_PACKED_STRUCT(struct ChipInfoPOD { RelPtr<RelPtr<char>> tile_wire_names; }); -#if defined(_MSC_VER) +#if defined(_MSC_VER) || defined(EXTERNAL_CHIPDB_ROOT) extern const char *chipdb_blob_384; extern const char *chipdb_blob_1k; extern const char *chipdb_blob_5k; diff --git a/ice40/family.cmake b/ice40/family.cmake index 0e1d36e6..877b27ee 100644 --- a/ice40/family.cmake +++ b/ice40/family.cmake @@ -1,84 +1,86 @@ -if(ICE40_HX1K_ONLY) - set(devices 1k) - foreach (target ${family_targets}) - target_compile_definitions(${target} PRIVATE ICE40_HX1K_ONLY=1) - endforeach (target) -else() - set(devices 384 1k 5k 8k) -endif() +if (NOT EXTERNAL_CHIPDB) + if(ICE40_HX1K_ONLY) + set(devices 1k) + foreach (target ${family_targets}) + target_compile_definitions(${target} PRIVATE ICE40_HX1K_ONLY=1) + endforeach (target) + else() + set(devices 384 1k 5k 8k) + endif() -set(DB_PY ${CMAKE_CURRENT_SOURCE_DIR}/ice40/chipdb.py) + set(DB_PY ${CMAKE_CURRENT_SOURCE_DIR}/ice40/chipdb.py) -set(ICEBOX_ROOT "/usr/local/share/icebox" CACHE STRING "icebox location root") -file(MAKE_DIRECTORY ice40/chipdbs/) -add_library(ice40_chipdb OBJECT ice40/chipdbs/) -target_compile_definitions(ice40_chipdb PRIVATE NEXTPNR_NAMESPACE=nextpnr_${family}) -target_include_directories(ice40_chipdb PRIVATE ${family}/) + set(ICEBOX_ROOT "/usr/local/share/icebox" CACHE STRING "icebox location root") + file(MAKE_DIRECTORY ice40/chipdbs/) + add_library(ice40_chipdb OBJECT ice40/chipdbs/) + target_compile_definitions(ice40_chipdb PRIVATE NEXTPNR_NAMESPACE=nextpnr_${family}) + target_include_directories(ice40_chipdb PRIVATE ${family}/) -if (MSVC) - target_sources(ice40_chipdb PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/ice40/resource/embed.cc) - set_source_files_properties(${CMAKE_CURRENT_SOURCE_DIR}/ice40/resources/chipdb.rc PROPERTIES LANGUAGE RC) - foreach (dev ${devices}) - if (dev EQUAL "5k") - set(OPT_FAST "") - set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_up5k.txt) - elseif(dev EQUAL "384") - set(OPT_FAST "") - set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_lp384.txt) - else() - set(OPT_FAST --fast ${ICEBOX_ROOT}/timings_hx${dev}.txt) - set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_lp${dev}.txt) - endif() - set(DEV_TXT_DB ${ICEBOX_ROOT}/chipdb-${dev}.txt) - set(DEV_CC_BBA_DB ${CMAKE_CURRENT_SOURCE_DIR}/ice40/chipdbs/chipdb-${dev}.bba) - set(DEV_CC_DB ${CMAKE_CURRENT_SOURCE_DIR}/ice40/chipdbs/chipdb-${dev}.bin) - set(DEV_CONSTIDS_INC ${CMAKE_CURRENT_SOURCE_DIR}/ice40/constids.inc) - set(DEV_GFXH ${CMAKE_CURRENT_SOURCE_DIR}/ice40/gfx.h) - add_custom_command(OUTPUT ${DEV_CC_BBA_DB} - COMMAND ${PYTHON_EXECUTABLE} ${DB_PY} -p ${DEV_CONSTIDS_INC} -g ${DEV_GFXH} ${OPT_FAST} ${OPT_SLOW} ${DEV_TXT_DB} > ${DEV_CC_BBA_DB} - DEPENDS ${DEV_CONSTIDS_INC} ${DEV_GFXH} ${DEV_TXT_DB} ${DB_PY} - ) - add_custom_command(OUTPUT ${DEV_CC_DB} - COMMAND bbasm ${DEV_CC_BBA_DB} ${DEV_CC_DB} - DEPENDS bbasm ${DEV_CC_BBA_DB} - ) - target_sources(ice40_chipdb PRIVATE ${DEV_CC_DB}) - set_source_files_properties(${DEV_CC_DB} PROPERTIES HEADER_FILE_ONLY TRUE) - foreach (target ${family_targets}) - target_sources(${target} PRIVATE $<TARGET_OBJECTS:ice40_chipdb> ${CMAKE_CURRENT_SOURCE_DIR}/ice40/resource/chipdb.rc) - endforeach (target) - endforeach (dev) -else() - target_compile_options(ice40_chipdb PRIVATE -g0 -O0 -w) - foreach (dev ${devices}) - if (dev EQUAL "5k") - set(OPT_FAST "") - set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_up5k.txt) - elseif(dev EQUAL "384") - set(OPT_FAST "") - set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_lp384.txt) - else() - set(OPT_FAST --fast ${ICEBOX_ROOT}/timings_hx${dev}.txt) - set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_lp${dev}.txt) - endif() - set(DEV_TXT_DB ${ICEBOX_ROOT}/chipdb-${dev}.txt) - set(DEV_CC_BBA_DB ${CMAKE_CURRENT_SOURCE_DIR}/ice40/chipdbs/chipdb-${dev}.bba) - set(DEV_CC_DB ${CMAKE_CURRENT_SOURCE_DIR}/ice40/chipdbs/chipdb-${dev}.cc) - set(DEV_CONSTIDS_INC ${CMAKE_CURRENT_SOURCE_DIR}/ice40/constids.inc) - set(DEV_GFXH ${CMAKE_CURRENT_SOURCE_DIR}/ice40/gfx.h) - add_custom_command(OUTPUT ${DEV_CC_BBA_DB} - COMMAND ${PYTHON_EXECUTABLE} ${DB_PY} -p ${DEV_CONSTIDS_INC} -g ${DEV_GFXH} ${OPT_FAST} ${OPT_SLOW} ${DEV_TXT_DB} > ${DEV_CC_BBA_DB}.new - COMMAND mv ${DEV_CC_BBA_DB}.new ${DEV_CC_BBA_DB} - DEPENDS ${DEV_CONSTIDS_INC} ${DEV_GFXH} ${DEV_TXT_DB} ${DB_PY} - ) - add_custom_command(OUTPUT ${DEV_CC_DB} - COMMAND bbasm --c ${DEV_CC_BBA_DB} ${DEV_CC_DB}.new - COMMAND mv ${DEV_CC_DB}.new ${DEV_CC_DB} - DEPENDS bbasm ${DEV_CC_BBA_DB} - ) - target_sources(ice40_chipdb PRIVATE ${DEV_CC_DB}) - foreach (target ${family_targets}) - target_sources(${target} PRIVATE $<TARGET_OBJECTS:ice40_chipdb>) - endforeach (target) - endforeach (dev) + if (MSVC) + target_sources(ice40_chipdb PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/ice40/resource/embed.cc) + set_source_files_properties(${CMAKE_CURRENT_SOURCE_DIR}/ice40/resources/chipdb.rc PROPERTIES LANGUAGE RC) + foreach (dev ${devices}) + if (dev EQUAL "5k") + set(OPT_FAST "") + set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_up5k.txt) + elseif(dev EQUAL "384") + set(OPT_FAST "") + set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_lp384.txt) + else() + set(OPT_FAST --fast ${ICEBOX_ROOT}/timings_hx${dev}.txt) + set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_lp${dev}.txt) + endif() + set(DEV_TXT_DB ${ICEBOX_ROOT}/chipdb-${dev}.txt) + set(DEV_CC_BBA_DB ${CMAKE_CURRENT_SOURCE_DIR}/ice40/chipdbs/chipdb-${dev}.bba) + set(DEV_CC_DB ${CMAKE_CURRENT_SOURCE_DIR}/ice40/chipdbs/chipdb-${dev}.bin) + set(DEV_CONSTIDS_INC ${CMAKE_CURRENT_SOURCE_DIR}/ice40/constids.inc) + set(DEV_GFXH ${CMAKE_CURRENT_SOURCE_DIR}/ice40/gfx.h) + add_custom_command(OUTPUT ${DEV_CC_BBA_DB} + COMMAND ${PYTHON_EXECUTABLE} ${DB_PY} -p ${DEV_CONSTIDS_INC} -g ${DEV_GFXH} ${OPT_FAST} ${OPT_SLOW} ${DEV_TXT_DB} > ${DEV_CC_BBA_DB} + DEPENDS ${DEV_CONSTIDS_INC} ${DEV_GFXH} ${DEV_TXT_DB} ${DB_PY} + ) + add_custom_command(OUTPUT ${DEV_CC_DB} + COMMAND bbasm ${DEV_CC_BBA_DB} ${DEV_CC_DB} + DEPENDS bbasm ${DEV_CC_BBA_DB} + ) + target_sources(ice40_chipdb PRIVATE ${DEV_CC_DB}) + set_source_files_properties(${DEV_CC_DB} PROPERTIES HEADER_FILE_ONLY TRUE) + foreach (target ${family_targets}) + target_sources(${target} PRIVATE $<TARGET_OBJECTS:ice40_chipdb> ${CMAKE_CURRENT_SOURCE_DIR}/ice40/resource/chipdb.rc) + endforeach (target) + endforeach (dev) + else() + target_compile_options(ice40_chipdb PRIVATE -g0 -O0 -w) + foreach (dev ${devices}) + if (dev EQUAL "5k") + set(OPT_FAST "") + set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_up5k.txt) + elseif(dev EQUAL "384") + set(OPT_FAST "") + set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_lp384.txt) + else() + set(OPT_FAST --fast ${ICEBOX_ROOT}/timings_hx${dev}.txt) + set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_lp${dev}.txt) + endif() + set(DEV_TXT_DB ${ICEBOX_ROOT}/chipdb-${dev}.txt) + set(DEV_CC_BBA_DB ${CMAKE_CURRENT_SOURCE_DIR}/ice40/chipdbs/chipdb-${dev}.bba) + set(DEV_CC_DB ${CMAKE_CURRENT_SOURCE_DIR}/ice40/chipdbs/chipdb-${dev}.cc) + set(DEV_CONSTIDS_INC ${CMAKE_CURRENT_SOURCE_DIR}/ice40/constids.inc) + set(DEV_GFXH ${CMAKE_CURRENT_SOURCE_DIR}/ice40/gfx.h) + add_custom_command(OUTPUT ${DEV_CC_BBA_DB} + COMMAND ${PYTHON_EXECUTABLE} ${DB_PY} -p ${DEV_CONSTIDS_INC} -g ${DEV_GFXH} ${OPT_FAST} ${OPT_SLOW} ${DEV_TXT_DB} > ${DEV_CC_BBA_DB}.new + COMMAND mv ${DEV_CC_BBA_DB}.new ${DEV_CC_BBA_DB} + DEPENDS ${DEV_CONSTIDS_INC} ${DEV_GFXH} ${DEV_TXT_DB} ${DB_PY} + ) + add_custom_command(OUTPUT ${DEV_CC_DB} + COMMAND bbasm --c ${DEV_CC_BBA_DB} ${DEV_CC_DB}.new + COMMAND mv ${DEV_CC_DB}.new ${DEV_CC_DB} + DEPENDS bbasm ${DEV_CC_BBA_DB} + ) + target_sources(ice40_chipdb PRIVATE ${DEV_CC_DB}) + foreach (target ${family_targets}) + target_sources(${target} PRIVATE $<TARGET_OBJECTS:ice40_chipdb>) + endforeach (target) + endforeach (dev) + endif() endif() |