diff options
27 files changed, 511 insertions, 55 deletions
diff --git a/3rdparty/qtimgui/ImGuiRenderer.cpp b/3rdparty/qtimgui/ImGuiRenderer.cpp index 21a2423a..e77b47de 100644 --- a/3rdparty/qtimgui/ImGuiRenderer.cpp +++ b/3rdparty/qtimgui/ImGuiRenderer.cpp @@ -39,7 +39,7 @@ QByteArray g_currentClipboardText; void ImGuiRenderer::initialize(WindowWrapper *window) { m_window.reset(window); initializeOpenGLFunctions(); - g_fun = new QOpenGLFunctions_3_3_Core(); + g_fun = new QOpenGLFunctions_3_2_Core(); g_fun->initializeOpenGLFunctions(); ImGui::CreateContext(); diff --git a/3rdparty/qtimgui/ImGuiRenderer.h b/3rdparty/qtimgui/ImGuiRenderer.h index f0d7315e..8962c07b 100644 --- a/3rdparty/qtimgui/ImGuiRenderer.h +++ b/3rdparty/qtimgui/ImGuiRenderer.h @@ -1,7 +1,7 @@ #pragma once #include <QOpenGLFunctions> -#include <QOpenGLFunctions_3_3_Core> +#include <QOpenGLFunctions_3_2_Core> #include <QObject> #include <QPoint> #include <imgui.h> @@ -54,7 +54,7 @@ private: int g_AttribLocationTex = 0, g_AttribLocationProjMtx = 0; int g_AttribLocationPosition = 0, g_AttribLocationUV = 0, g_AttribLocationColor = 0; unsigned int g_VboHandle = 0, g_VaoHandle = 0, g_ElementsHandle = 0; - QOpenGLFunctions_3_3_Core *g_fun = nullptr; + QOpenGLFunctions_3_2_Core *g_fun = nullptr; }; } diff --git a/common/placer1.cc b/common/placer1.cc index 01f822a5..0d7c0701 100644 --- a/common/placer1.cc +++ b/common/placer1.cc @@ -118,6 +118,12 @@ class SAPlacer loc_name.c_str(), bel_type.c_str(ctx), cell->name.c_str(ctx), cell->type.c_str(ctx)); } + auto bound_cell = ctx->getBoundBelCell(bel); + if (bound_cell) { + log_error("Cell \'%s\' cannot be bound to bel \'%s\' since it is already bound to cell \'%s\'\n", + cell->name.c_str(ctx), loc_name.c_str(), bound_cell->name.c_str(ctx)); + } + ctx->bindBel(bel, cell, STRENGTH_USER); locked_bels.insert(bel); placed_cells++; diff --git a/ecp5/arch.cc b/ecp5/arch.cc index ab3e15c0..4a0b31b5 100644 --- a/ecp5/arch.cc +++ b/ecp5/arch.cc @@ -651,6 +651,8 @@ TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, Id return TMG_IGNORE; // FIXME } else if (cell->type == id_ALU54B) { return TMG_IGNORE; // FIXME + } else if (cell->type == id_EHXPLLL) { + return TMG_IGNORE; } else { NPNR_ASSERT_FALSE_STR("no timing data for cell type '" + cell->type.str(this) + "'"); } diff --git a/ecp5/arch.h b/ecp5/arch.h index 35c8df19..583d539f 100644 --- a/ecp5/arch.h +++ b/ecp5/arch.h @@ -491,7 +491,7 @@ struct Arch : BaseCtx BelId getBelByLocation(Loc loc) const; BelRange getBelsByTile(int x, int y) const; - bool getBelGlobalBuf(BelId bel) const { return false; } + bool getBelGlobalBuf(BelId bel) const { return getBelType(bel) == id_DCCA; } bool checkBelAvail(BelId bel) const { @@ -917,6 +917,9 @@ struct Arch : BaseCtx GlobalInfoPOD globalInfoAtLoc(Location loc); + // Apply LPF constraints to the context + bool applyLPF(std::string filename, std::istream &in); + IdString id_trellis_slice; IdString id_clk, id_lsr; IdString id_clkmux, id_lsrmux; diff --git a/ecp5/bitstream.cc b/ecp5/bitstream.cc index c7b5d562..95256732 100644 --- a/ecp5/bitstream.cc +++ b/ecp5/bitstream.cc @@ -378,6 +378,32 @@ std::vector<std::string> get_dsp_tiles(Context *ctx, BelId bel) } return tiles; } + +// Get the list of tiles corresponding to a PLL +std::vector<std::string> get_pll_tiles(Context *ctx, BelId bel) +{ + std::string name = ctx->locInfo(bel)->bel_data[bel.index].name.get(); + std::vector<std::string> tiles; + Loc loc = ctx->getBelLocation(bel); + + if (name == "EHXPLL_UL") { + tiles.push_back(ctx->getTileByTypeAndLocation(loc.y, loc.x - 1, "PLL0_UL")); + tiles.push_back(ctx->getTileByTypeAndLocation(loc.y + 1, loc.x - 1, "PLL1_UL")); + } else if (name == "EHXPLL_LL") { + tiles.push_back(ctx->getTileByTypeAndLocation(loc.y + 1, loc.x, "PLL0_LL")); + tiles.push_back(ctx->getTileByTypeAndLocation(loc.y + 1, loc.x + 1, "BANKREF8")); + } else if (name == "EHXPLL_LR") { + tiles.push_back(ctx->getTileByTypeAndLocation(loc.y + 1, loc.x, "PLL0_LR")); + tiles.push_back(ctx->getTileByTypeAndLocation(loc.y + 1, loc.x - 1, "PLL1_LR")); + } else if (name == "EHXPLL_UR") { + tiles.push_back(ctx->getTileByTypeAndLocation(loc.y, loc.x - 1, "PLL0_UR")); + tiles.push_back(ctx->getTileByTypeAndLocation(loc.y + 1, loc.x - 1, "PLL1_UR")); + } else { + NPNR_ASSERT_FALSE_STR("bad PLL loc " + name); + } + return tiles; +} + void fix_tile_names(Context *ctx, ChipConfig &cc) { // Remove the V prefix/suffix on certain tiles if device is a SERDES variant @@ -390,7 +416,7 @@ void fix_tile_names(Context *ctx, ChipConfig &cc) auto vcib = tile.first.find("VCIB"); if (vcib != std::string::npos) { // Remove the V - newname.erase(vcib); + newname.erase(vcib, 1); tiletype_xform[tile.first] = newname; } else if (tile.first.back() == 'V') { // BMID_0V or BMID_2V @@ -429,6 +455,14 @@ void tieoff_dsp_ports(Context *ctx, ChipConfig &cc, CellInfo *ci) } } +static void set_pip(Context *ctx, ChipConfig &cc, PipId pip) +{ + std::string tile = ctx->getPipTilename(pip); + std::string source = get_trellis_wirename(ctx, pip.location, ctx->getPipSrcWire(pip)); + std::string sink = get_trellis_wirename(ctx, pip.location, ctx->getPipDstWire(pip)); + cc.tiles[tile].add_arc(sink, source); +} + void write_bitstream(Context *ctx, std::string base_config_file, std::string text_config_file) { ChipConfig cc; @@ -450,10 +484,16 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex for (auto pip : ctx->getPips()) { if (ctx->getBoundPipNet(pip) != nullptr) { if (ctx->getPipClass(pip) == 0) { // ignore fixed pips - std::string tile = ctx->getPipTilename(pip); std::string source = get_trellis_wirename(ctx, pip.location, ctx->getPipSrcWire(pip)); - std::string sink = get_trellis_wirename(ctx, pip.location, ctx->getPipDstWire(pip)); - cc.tiles[tile].add_arc(sink, source); + if (source.find("CLKI_PLL") != std::string::npos) { + // Special case - must set pip in all relevant tiles + for (auto equiv_pip : ctx->getPipsUphill(ctx->getPipDstWire(pip))) { + if (ctx->getPipSrcWire(equiv_pip) == ctx->getPipSrcWire(pip)) + set_pip(ctx, cc, equiv_pip); + } + } else { + set_pip(ctx, cc, pip); + } } } } @@ -624,6 +664,8 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex if (dir == "INPUT" && !is_differential(ioType_from_str(iotype))) { cc.tiles[pio_tile].add_enum(pio + ".HYSTERESIS", "ON"); } + if (ci->attrs.count(ctx->id("SLEWRATE"))) + cc.tiles[pio_tile].add_enum(pio + ".SLEWRATE", str_or_default(ci->attrs, ctx->id("SLEWRATE"), "SLOW")); } else if (ci->type == ctx->id("DCCA")) { // Nothing to do } else if (ci->type == ctx->id("DP16KD")) { @@ -867,7 +909,96 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex } tieoff_dsp_ports(ctx, cc, ci); cc.tilegroups.push_back(tg); + } else if (ci->type == id_EHXPLLL) { + TileGroup tg; + tg.tiles = get_pll_tiles(ctx, ci->bel); + + tg.config.add_enum("MODE", "EHXPLLL"); + + tg.config.add_word("CLKI_DIV", int_to_bitvector(int_or_default(ci->params, ctx->id("CLKI_DIV"), 1) - 1, 7)); + tg.config.add_word("CLKFB_DIV", + int_to_bitvector(int_or_default(ci->params, ctx->id("CLKFB_DIV"), 1) - 1, 7)); + + tg.config.add_enum("CLKOP_ENABLE", str_or_default(ci->params, ctx->id("CLKOP_ENABLE"), "ENABLED")); + tg.config.add_enum("CLKOS_ENABLE", str_or_default(ci->params, ctx->id("CLKOS_ENABLE"), "ENABLED")); + tg.config.add_enum("CLKOS2_ENABLE", str_or_default(ci->params, ctx->id("CLKOS2_ENABLE"), "ENABLED")); + tg.config.add_enum("CLKOS3_ENABLE", str_or_default(ci->params, ctx->id("CLKOS3_ENABLE"), "ENABLED")); + + for (std::string out : {"CLKOP", "CLKOS", "CLKOS2", "CLKOS3"}) { + tg.config.add_word(out + "_DIV", + int_to_bitvector(int_or_default(ci->params, ctx->id(out + "_DIV"), 8) - 1, 7)); + tg.config.add_word(out + "_CPHASE", + int_to_bitvector(int_or_default(ci->params, ctx->id(out + "_CPHASE"), 0), 7)); + tg.config.add_word(out + "_FPHASE", + int_to_bitvector(int_or_default(ci->params, ctx->id(out + "_FPHASE"), 0), 3)); + } + tg.config.add_enum("FEEDBK_PATH", str_or_default(ci->params, ctx->id("FEEDBK_PATH"), "CLKOP")); + tg.config.add_enum("CLKOP_TRIM_POL", str_or_default(ci->params, ctx->id("CLKOP_TRIM_POL"), "RISING")); + tg.config.add_enum("CLKOP_TRIM_DELAY", str_or_default(ci->params, ctx->id("CLKOP_TRIM_DELAY"), "0")); + tg.config.add_enum("CLKOS_TRIM_POL", str_or_default(ci->params, ctx->id("CLKOS_TRIM_POL"), "RISING")); + tg.config.add_enum("CLKOS_TRIM_DELAY", str_or_default(ci->params, ctx->id("CLKOS_TRIM_DELAY"), "0")); + + tg.config.add_enum("OUTDIVIDER_MUXA", str_or_default(ci->params, ctx->id("OUTDIVIDER_MUXA"), + get_net_or_empty(ci, id_CLKOP) ? "DIVA" : "REFCLK")); + tg.config.add_enum("OUTDIVIDER_MUXB", str_or_default(ci->params, ctx->id("OUTDIVIDER_MUXB"), + get_net_or_empty(ci, id_CLKOP) ? "DIVB" : "REFCLK")); + tg.config.add_enum("OUTDIVIDER_MUXC", str_or_default(ci->params, ctx->id("OUTDIVIDER_MUXC"), + get_net_or_empty(ci, id_CLKOP) ? "DIVC" : "REFCLK")); + tg.config.add_enum("OUTDIVIDER_MUXD", str_or_default(ci->params, ctx->id("OUTDIVIDER_MUXD"), + get_net_or_empty(ci, id_CLKOP) ? "DIVD" : "REFCLK")); + + tg.config.add_word("PLL_LOCK_MODE", + int_to_bitvector(int_or_default(ci->params, ctx->id("PLL_LOCK_MODE"), 0), 3)); + + tg.config.add_enum("STDBY_ENABLE", str_or_default(ci->params, ctx->id("STDBY_ENABLE"), "DISABLED")); + tg.config.add_enum("REFIN_RESET", str_or_default(ci->params, ctx->id("REFIN_RESET"), "DISABLED")); + tg.config.add_enum("SYNC_ENABLE", str_or_default(ci->params, ctx->id("SYNC_ENABLE"), "DISABLED")); + tg.config.add_enum("INT_LOCK_STICKY", str_or_default(ci->params, ctx->id("INT_LOCK_STICKY"), "ENABLED")); + tg.config.add_enum("DPHASE_SOURCE", str_or_default(ci->params, ctx->id("DPHASE_SOURCE"), "DISABLED")); + tg.config.add_enum("PLLRST_ENA", str_or_default(ci->params, ctx->id("PLLRST_ENA"), "DISABLED")); + tg.config.add_enum("INTFB_WAKE", str_or_default(ci->params, ctx->id("INTFB_WAKE"), "DISABLED")); + + tg.config.add_word("KVCO", int_to_bitvector(int_or_default(ci->attrs, ctx->id("KVCO"), 0), 3)); + tg.config.add_word("LPF_CAPACITOR", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("LPF_CAPACITOR"), 0), 2)); + tg.config.add_word("LPF_RESISTOR", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("LPF_RESISTOR"), 0), 7)); + tg.config.add_word("ICP_CURRENT", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("ICP_CURRENT"), 0), 5)); + tg.config.add_word("FREQ_LOCK_ACCURACY", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("FREQ_LOCK_ACCURACY"), 0), 2)); + + tg.config.add_word("MFG_GMC_GAIN", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG_GMC_GAIN"), 0), 3)); + tg.config.add_word("MFG_GMC_TEST", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG_GMC_TEST"), 14), 4)); + tg.config.add_word("MFG1_TEST", int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG1_TEST"), 0), 3)); + tg.config.add_word("MFG2_TEST", int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG2_TEST"), 0), 3)); + + tg.config.add_word("MFG_FORCE_VFILTER", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG_FORCE_VFILTER"), 0), 1)); + tg.config.add_word("MFG_ICP_TEST", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG_ICP_TEST"), 0), 1)); + tg.config.add_word("MFG_EN_UP", int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG_EN_UP"), 0), 1)); + tg.config.add_word("MFG_FLOAT_ICP", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG_FLOAT_ICP"), 0), 1)); + tg.config.add_word("MFG_GMC_PRESET", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG_GMC_PRESET"), 0), 1)); + tg.config.add_word("MFG_LF_PRESET", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG_LF_PRESET"), 0), 1)); + tg.config.add_word("MFG_GMC_RESET", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG_GMC_RESET"), 0), 1)); + tg.config.add_word("MFG_LF_RESET", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG_LF_RESET"), 0), 1)); + tg.config.add_word("MFG_LF_RESGRND", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG_LF_RESGRND"), 0), 1)); + tg.config.add_word("MFG_GMCREF_SEL", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG_GMCREF_SEL"), 0), 2)); + tg.config.add_word("MFG_ENABLE_FILTEROPAMP", + int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG_ENABLE_FILTEROPAMP"), 0), 1)); + + cc.tilegroups.push_back(tg); } else { NPNR_ASSERT_FALSE("unsupported cell type"); } diff --git a/ecp5/cells.cc b/ecp5/cells.cc index a728104d..31839ee4 100644 --- a/ecp5/cells.cc +++ b/ecp5/cells.cc @@ -343,4 +343,46 @@ void dram_to_ram_slice(Context *ctx, CellInfo *ram, CellInfo *lc, CellInfo *ramw } } +void nxio_to_tr(Context *ctx, CellInfo *nxio, CellInfo *trio, std::vector<std::unique_ptr<CellInfo>> &created_cells, + std::unordered_set<IdString> &todelete_cells) +{ + if (nxio->type == ctx->id("$nextpnr_ibuf")) { + trio->params[ctx->id("DIR")] = "INPUT"; + replace_port(nxio, ctx->id("O"), trio, ctx->id("O")); + } else if (nxio->type == ctx->id("$nextpnr_obuf")) { + trio->params[ctx->id("DIR")] = "OUTPUT"; + replace_port(nxio, ctx->id("I"), trio, ctx->id("I")); + } else if (nxio->type == ctx->id("$nextpnr_iobuf")) { + // N.B. tristate will be dealt with below + trio->params[ctx->id("DIR")] = "BIDIR"; + replace_port(nxio, ctx->id("I"), trio, ctx->id("I")); + replace_port(nxio, ctx->id("O"), trio, ctx->id("O")); + } else { + NPNR_ASSERT(false); + } + NetInfo *donet = trio->ports.at(ctx->id("I")).net; + CellInfo *tbuf = net_driven_by( + ctx, donet, [](const Context *ctx, const CellInfo *cell) { return cell->type == ctx->id("$_TBUF_"); }, + ctx->id("Y")); + if (tbuf) { + replace_port(tbuf, ctx->id("I"), trio, ctx->id("I")); + // Need to invert E to form T + std::unique_ptr<CellInfo> inv_lut = create_ecp5_cell(ctx, ctx->id("LUT4"), trio->name.str(ctx) + "$invert_T"); + replace_port(tbuf, ctx->id("E"), inv_lut.get(), ctx->id("A")); + inv_lut->params[ctx->id("INIT")] = "21845"; + connect_ports(ctx, inv_lut.get(), ctx->id("Z"), trio, ctx->id("T")); + created_cells.push_back(std::move(inv_lut)); + + if (donet->users.size() > 1) { + for (auto user : donet->users) + log_info(" remaining tristate user: %s.%s\n", user.cell->name.c_str(ctx), user.port.c_str(ctx)); + log_error("unsupported tristate IO pattern for IO buffer '%s', " + "instantiate SB_IO manually to ensure correct behaviour\n", + nxio->name.c_str(ctx)); + } + ctx->nets.erase(donet->name); + todelete_cells.insert(tbuf->name); + } +} + NEXTPNR_NAMESPACE_END diff --git a/ecp5/cells.h b/ecp5/cells.h index a5229fe0..9c2ff3cf 100644 --- a/ecp5/cells.h +++ b/ecp5/cells.h @@ -52,6 +52,10 @@ void ccu2c_to_slice(Context *ctx, CellInfo *ccu, CellInfo *lc); void dram_to_ramw(Context *ctx, CellInfo *ram, CellInfo *lc); void dram_to_ram_slice(Context *ctx, CellInfo *ram, CellInfo *lc, CellInfo *ramw, int index); +// Convert a nextpnr IO buffer to a TRELLIS_IO +void nxio_to_tr(Context *ctx, CellInfo *nxio, CellInfo *trio, std::vector<std::unique_ptr<CellInfo>> &created_cells, + std::unordered_set<IdString> &todelete_cells); + NEXTPNR_NAMESPACE_END #endif diff --git a/ecp5/constids.inc b/ecp5/constids.inc index e3bfec6e..bdcbc1ea 100644 --- a/ecp5/constids.inc +++ b/ecp5/constids.inc @@ -787,3 +787,26 @@ X(OVER) X(UNDER) X(OVERUNDER) X(SIGNEDR) + +X(EHXPLLL) +X(CLKFB) +X(PHASESEL1) +X(PHASESEL0) +X(PHASEDIR) +X(PHASESTEP) +X(PHASELOADREG) +X(STDBY) +X(PLLWAKESYNC) +X(RST) +X(ENCLKOP) +X(ENCLKOS) +X(ENCLKOS2) +X(ENCLKOS3) +X(CLKOP) +X(CLKOS) +X(CLKOS2) +X(CLKOS3) +X(LOCK) +X(INTLOCK) +X(REFCLK) +X(CLKINTFB) diff --git a/ecp5/globals.cc b/ecp5/globals.cc index 5e5a2a01..06412fef 100644 --- a/ecp5/globals.cc +++ b/ecp5/globals.cc @@ -25,6 +25,7 @@ #include "log.h" #include "nextpnr.h" #include "place_common.h" +#include "util.h" #define fmt_str(x) (static_cast<const std::ostringstream &>(std::ostringstream() << x).str()) NEXTPNR_NAMESPACE_BEGIN @@ -257,6 +258,45 @@ class Ecp5GlobalRouter return true; } + // Get DCC wirelength based on source + wirelen_t get_dcc_wirelen(CellInfo *dcc) + { + NetInfo *clki = dcc->ports.at(id_CLKI).net; + BelId drv_bel; + const PortRef &drv = clki->driver; + if (drv.cell == nullptr) { + return 0; + } else if (drv.cell->attrs.count(ctx->id("BEL"))) { + drv_bel = ctx->getBelByName(ctx->id(drv.cell->attrs.at(ctx->id("BEL")))); + } else { + // Check if driver is a singleton + BelId last_bel; + bool singleton = true; + for (auto bel : ctx->getBels()) { + if (ctx->getBelType(bel) == drv.cell->type) { + if (last_bel != BelId()) { + singleton = false; + break; + } + last_bel = bel; + } + } + if (singleton && last_bel != BelId()) { + drv_bel = last_bel; + } + } + if (drv_bel == BelId()) { + // Driver is not locked. Use standard metric + float tns; + return get_net_metric(ctx, clki, MetricType::WIRELENGTH, tns); + } else { + // Driver is locked + Loc dcc_loc = ctx->getBelLocation(dcc->bel); + Loc drv_loc = ctx->getBelLocation(drv_bel); + return std::abs(dcc_loc.x - drv_loc.x) + std::abs(dcc_loc.y - drv_loc.y); + } + } + // Attempt to place a DCC void place_dcc(CellInfo *dcc) { @@ -266,8 +306,7 @@ class Ecp5GlobalRouter if (ctx->getBelType(bel) == id_DCCA && ctx->checkBelAvail(bel)) { if (ctx->isValidBelForCell(dcc, bel)) { ctx->bindBel(bel, dcc, STRENGTH_LOCKED); - float tns; - wirelen_t wirelen = get_net_metric(ctx, dcc->ports.at(id_CLKI).net, MetricType::WIRELENGTH, tns); + wirelen_t wirelen = get_dcc_wirelen(dcc); if (wirelen < best_wirelen) { best_bel = bel; best_wirelen = wirelen; @@ -292,11 +331,16 @@ class Ecp5GlobalRouter glbnet->is_global = true; dcc->ports[id_CLKO].net = glbnet.get(); - glbnet->users = net->users; + std::vector<PortRef> keep_users; for (auto user : net->users) { - user.cell->ports.at(user.port).net = glbnet.get(); + if (user.port == id_CLKFB) { + keep_users.push_back(user); + } else { + glbnet->users.push_back(user); + user.cell->ports.at(user.port).net = glbnet.get(); + } } - net->users.clear(); + net->users = keep_users; dcc->ports[id_CLKI].net = net; PortRef clki_pr; @@ -322,47 +366,61 @@ class Ecp5GlobalRouter Context *ctx; public: - void promote_and_route_globals() + void promote_globals() { - log_info("Promoting and routing globals...\n"); + log_info("Promoting globals...\n"); auto clocks = get_clocks(); + for (auto clock : clocks) { + log_info(" promoting clock net %s to global network\n", clock->name.c_str(ctx)); + insert_dcc(clock); + } + } + + void route_globals() + { + log_info("Routing globals...\n"); std::set<int> all_globals, fab_globals; for (int i = 0; i < 16; i++) { all_globals.insert(i); if (i < 8) fab_globals.insert(i); } - for (auto clock : clocks) { - bool drives_fabric = std::any_of(clock->users.begin(), clock->users.end(), - [this](const PortRef &port) { return !is_clock_port(port); }); - int glbid; - if (drives_fabric) { - if (fab_globals.empty()) - continue; - glbid = *(fab_globals.begin()); - } else { - glbid = *(all_globals.begin()); - } - all_globals.erase(glbid); - fab_globals.erase(glbid); - log_info(" promoting clock net %s to global %d\n", clock->name.c_str(ctx), glbid); - auto old_users = clock->users; - NetInfo *global = insert_dcc(clock); - bool routed = route_onto_global(global, glbid); - NPNR_ASSERT(routed); - - // WCK must have routing priority - auto sorted_users = global->users; - std::sort(sorted_users.begin(), sorted_users.end(), [this](const PortRef &a, const PortRef &b) { - return global_route_priority(a) < global_route_priority(b); - }); - for (const auto &user : sorted_users) { - route_logic_tile_global(global, glbid, user); + for (auto cell : sorted(ctx->cells)) { + CellInfo *ci = cell.second; + if (ci->type == id_DCCA) { + NetInfo *clock = ci->ports.at(id_CLKO).net; + NPNR_ASSERT(clock != nullptr); + bool drives_fabric = std::any_of(clock->users.begin(), clock->users.end(), + [this](const PortRef &port) { return !is_clock_port(port); }); + + int glbid; + if (drives_fabric) { + if (fab_globals.empty()) + continue; + glbid = *(fab_globals.begin()); + } else { + glbid = *(all_globals.begin()); + } + all_globals.erase(glbid); + fab_globals.erase(glbid); + + log_info(" routing clock net %s using global %d\n", clock->name.c_str(ctx), glbid); + bool routed = route_onto_global(clock, glbid); + NPNR_ASSERT(routed); + + // WCK must have routing priority + auto sorted_users = clock->users; + std::sort(sorted_users.begin(), sorted_users.end(), [this](const PortRef &a, const PortRef &b) { + return global_route_priority(a) < global_route_priority(b); + }); + for (const auto &user : sorted_users) { + route_logic_tile_global(clock, glbid, user); + } } } } }; - -void route_ecp5_globals(Context *ctx) { Ecp5GlobalRouter(ctx).promote_and_route_globals(); } +void promote_ecp5_globals(Context *ctx) { Ecp5GlobalRouter(ctx).promote_globals(); } +void route_ecp5_globals(Context *ctx) { Ecp5GlobalRouter(ctx).route_globals(); } NEXTPNR_NAMESPACE_END diff --git a/ecp5/globals.h b/ecp5/globals.h index 23e25c8d..cc7cf98e 100644 --- a/ecp5/globals.h +++ b/ecp5/globals.h @@ -21,6 +21,7 @@ NEXTPNR_NAMESPACE_BEGIN +void promote_ecp5_globals(Context *ctx); void route_ecp5_globals(Context *ctx); NEXTPNR_NAMESPACE_END
\ No newline at end of file diff --git a/ecp5/lpf.cc b/ecp5/lpf.cc new file mode 100644 index 00000000..4bde660e --- /dev/null +++ b/ecp5/lpf.cc @@ -0,0 +1,106 @@ +/* + * nextpnr -- Next Generation Place and Route + * + * Copyright (C) 2018 David Shah <david@symbioticeda.com> + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include <sstream> +#include "log.h" + +NEXTPNR_NAMESPACE_BEGIN + +bool Arch::applyLPF(std::string filename, std::istream &in) +{ + auto isempty = [](const std::string &str) { + return std::all_of(str.begin(), str.end(), [](char c) { return isblank(c); }); + }; + auto strip_quotes = [](const std::string &str) { + if (str.at(0) == '"') { + NPNR_ASSERT(str.back() == '"'); + return str.substr(1, str.size() - 2); + } else { + return str; + } + }; + + try { + if (!in) + log_error("failed to open LPF file\n"); + std::string line; + std::string linebuf; + while (std::getline(in, line)) { + size_t cstart = line.find('#'); + if (cstart != std::string::npos) + line = line.substr(0, cstart); + if (isempty(line)) + continue; + linebuf += line; + // Look for a command up to a semicolon + size_t scpos = linebuf.find(';'); + while (scpos != std::string::npos) { + std::string command = linebuf.substr(0, scpos); + // Split command into words + std::stringstream ss(command); + std::vector<std::string> words; + std::string tmp; + while (ss >> tmp) + words.push_back(tmp); + if (words.size() >= 0) { + std::string verb = words.at(0); + if (verb == "BLOCK" || verb == "SYSCONFIG" || verb == "FREQUENCY") { + log_warning(" ignoring unsupported LPF command '%s'\n", command.c_str()); + } else if (verb == "LOCATE") { + NPNR_ASSERT(words.at(1) == "COMP"); + std::string cell = strip_quotes(words.at(2)); + NPNR_ASSERT(words.at(3) == "SITE"); + auto fnd_cell = cells.find(id(cell)); + if (fnd_cell == cells.end()) { + log_warning("unmatched LPF 'LOCATE COMP' '%s'\n", cell.c_str()); + } else { + fnd_cell->second->attrs[id("LOC")] = strip_quotes(words.at(4)); + } + } else if (verb == "IOBUF") { + NPNR_ASSERT(words.at(1) == "PORT"); + std::string cell = strip_quotes(words.at(2)); + auto fnd_cell = cells.find(id(cell)); + if (fnd_cell == cells.end()) { + log_warning("unmatched LPF 'IOBUF PORT' '%s'\n", cell.c_str()); + } else { + for (size_t i = 3; i < words.size(); i++) { + std::string setting = words.at(i); + size_t eqpos = setting.find('='); + NPNR_ASSERT(eqpos != std::string::npos); + std::string key = setting.substr(0, eqpos), value = setting.substr(eqpos + 1); + fnd_cell->second->attrs[id(key)] = value; + } + } + } + } + + linebuf = linebuf.substr(scpos + 1); + scpos = linebuf.find(';'); + } + } + if (!isempty(linebuf)) + log_error("unexpected end of LPF file\n"); + settings.emplace(id("input/lpf"), filename); + return true; + } catch (log_execution_error_exception) { + return false; + } +} + +NEXTPNR_NAMESPACE_END diff --git a/ecp5/main.cc b/ecp5/main.cc index e71b0983..c444f96f 100644 --- a/ecp5/main.cc +++ b/ecp5/main.cc @@ -35,6 +35,7 @@ class ECP5CommandHandler : public CommandHandler virtual ~ECP5CommandHandler(){}; std::unique_ptr<Context> createContext() override; void setupArchContext(Context *ctx) override{}; + void customAfterLoad(Context *ctx) override; void validate() override; void customBitstream(Context *ctx) override; @@ -56,9 +57,13 @@ po::options_description ECP5CommandHandler::getArchOptions() specific.add_options()("um5g-25k", "set device type to LFE5UM5G-25F"); specific.add_options()("um5g-45k", "set device type to LFE5UM5G-45F"); specific.add_options()("um5g-85k", "set device type to LFE5UM5G-85F"); + specific.add_options()("package", po::value<std::string>(), "select device package (defaults to CABGA381)"); specific.add_options()("basecfg", po::value<std::string>(), "base chip configuration in Trellis text format"); specific.add_options()("textcfg", po::value<std::string>(), "textual configuration in Trellis format to write"); + + specific.add_options()("lpf", po::value<std::vector<std::string>>(), "LPF pin constraint file(s)"); + return specific; } void ECP5CommandHandler::validate() @@ -111,6 +116,17 @@ std::unique_ptr<Context> ECP5CommandHandler::createContext() return std::unique_ptr<Context>(new Context(chipArgs)); } +void ECP5CommandHandler::customAfterLoad(Context *ctx) +{ + if (vm.count("lpf")) { + std::vector<std::string> files = vm["lpf"].as<std::vector<std::string>>(); + for (const auto &filename : files) { + std::ifstream in(filename); + ctx->applyLPF(filename, in); + } + } +} + int main(int argc, char *argv[]) { ECP5CommandHandler handler(argc, argv); diff --git a/ecp5/pack.cc b/ecp5/pack.cc index 18debb74..73e15609 100644 --- a/ecp5/pack.cc +++ b/ecp5/pack.cc @@ -24,6 +24,7 @@ #include "cells.h" #include "chain_utils.h" #include "design_utils.h" +#include "globals.h" #include "log.h" #include "util.h" NEXTPNR_NAMESPACE_BEGIN @@ -266,11 +267,17 @@ class Ecp5Packer } } } else { - log_error("TRELLIS_IO required on all top level IOs...\n"); + // Create a TRELLIS_IO buffer + std::unique_ptr<CellInfo> tr_cell = + create_ecp5_cell(ctx, ctx->id("TRELLIS_IO"), ci->name.str(ctx) + "$tr_io"); + nxio_to_tr(ctx, ci, tr_cell.get(), new_cells, packed_cells); + new_cells.push_back(std::move(tr_cell)); + trio = new_cells.back().get(); } packed_cells.insert(ci->name); - std::copy(ci->attrs.begin(), ci->attrs.end(), std::inserter(trio->attrs, trio->attrs.begin())); + for (const auto &attr : ci->attrs) + trio->attrs[attr.first] = attr.second; auto loc_attr = trio->attrs.find(ctx->id("LOC")); if (loc_attr != trio->attrs.end()) { @@ -1041,6 +1048,7 @@ class Ecp5Packer pack_lut_pairs(); pack_remaining_luts(); pack_remaining_ffs(); + promote_ecp5_globals(ctx); ctx->check(); } diff --git a/gui/create_img.sh b/gui/create_img.sh new file mode 100755 index 00000000..1508d023 --- /dev/null +++ b/gui/create_img.sh @@ -0,0 +1,6 @@ +convert -font helvetica -fill red -pointsize 8 -gravity center -draw "text 2,8 'JSON'" resources/open.png resources/open_json.png +convert -font helvetica -fill red -pointsize 8 -gravity center -draw "text 2,8 'PCF'" resources/open.png ice40/resources/open_pcf.png +convert -font helvetica -fill red -pointsize 8 -gravity center -draw "text 2,8 'BASE'" resources/open.png ecp5/resources/open_base.png +convert -font helvetica -fill red -pointsize 8 -gravity center -draw "text 2,8 'LPF'" resources/open.png ecp5/resources/open_lpf.png +convert -font helvetica -fill red -pointsize 8 -gravity center -draw "text 2,8 'ASC'" resources/save.png ice40/resources/save_asc.png +convert -font helvetica -fill red -pointsize 7 -gravity center -draw "text 2,8 'CONFIG'" resources/save.png ecp5/resources/save_config.png
\ No newline at end of file diff --git a/gui/ecp5/mainwindow.cc b/gui/ecp5/mainwindow.cc index b3c53849..fe2f9e57 100644 --- a/gui/ecp5/mainwindow.cc +++ b/gui/ecp5/mainwindow.cc @@ -20,6 +20,7 @@ #include "mainwindow.h"
#include "bitstream.h"
#include "log.h"
+#include <fstream>
#include <QFileDialog>
#include <QInputDialog>
@@ -53,6 +54,12 @@ void MainWindow::newContext(Context *ctx) void MainWindow::createMenu()
{
// Add arch specific actions
+ actionLoadLPF = new QAction("Open LPF", this);
+ actionLoadLPF->setIcon(QIcon(":/icons/resources/open_lpf.png"));
+ actionLoadLPF->setStatusTip("Open LPF file");
+ actionLoadLPF->setEnabled(false);
+ connect(actionLoadLPF, &QAction::triggered, this, &MainWindow::open_lpf);
+
actionLoadBase = new QAction("Open Base Config", this);
actionLoadBase->setIcon(QIcon(":/icons/resources/open_base.png"));
actionLoadBase->setStatusTip("Open Base Config file");
@@ -67,10 +74,12 @@ void MainWindow::createMenu() // Add actions in menus
mainActionBar->addSeparator();
+ mainActionBar->addAction(actionLoadLPF);
mainActionBar->addAction(actionLoadBase);
mainActionBar->addAction(actionSaveConfig);
menuDesign->addSeparator();
+ menuDesign->addAction(actionLoadLPF);
menuDesign->addAction(actionLoadBase);
menuDesign->addAction(actionSaveConfig);
}
@@ -81,11 +90,11 @@ static QStringList getSupportedPackages(ArchArgs::ArchArgsTypes chip) {
QStringList packages;
const ChipInfoPOD *chip_info;
- if (chip == ArchArgs::LFE5U_25F) {
+ if (chip == ArchArgs::LFE5U_25F || chip == ArchArgs::LFE5UM_25F || chip == ArchArgs::LFE5UM5G_25F) {
chip_info = get_chip_info(reinterpret_cast<const RelPtr<ChipInfoPOD> *>(chipdb_blob_25k));
- } else if (chip == ArchArgs::LFE5U_45F) {
+ } else if (chip == ArchArgs::LFE5U_45F || chip == ArchArgs::LFE5UM_45F || chip == ArchArgs::LFE5UM5G_45F) {
chip_info = get_chip_info(reinterpret_cast<const RelPtr<ChipInfoPOD> *>(chipdb_blob_45k));
- } else if (chip == ArchArgs::LFE5U_85F) {
+ } else if (chip == ArchArgs::LFE5U_85F || chip == ArchArgs::LFE5UM_85F || chip == ArchArgs::LFE5UM5G_85F) {
chip_info = get_chip_info(reinterpret_cast<const RelPtr<ChipInfoPOD> *>(chipdb_blob_85k));
} else {
log_error("Unsupported ECP5 chip type.\n");
@@ -100,9 +109,15 @@ static QStringList getSupportedPackages(ArchArgs::ArchArgsTypes chip) void MainWindow::new_proj()
{
QMap<QString, int> arch;
- arch.insert("Lattice ECP5 25K", ArchArgs::LFE5U_25F);
- arch.insert("Lattice ECP5 45K", ArchArgs::LFE5U_45F);
- arch.insert("Lattice ECP5 85K", ArchArgs::LFE5U_85F);
+ arch.insert("Lattice ECP5 LFE5U-25F", ArchArgs::LFE5U_25F);
+ arch.insert("Lattice ECP5 LFE5U-45F", ArchArgs::LFE5U_45F);
+ arch.insert("Lattice ECP5 LFE5U-85F", ArchArgs::LFE5U_85F);
+ arch.insert("Lattice ECP5 LFE5UM-25F", ArchArgs::LFE5UM_25F);
+ arch.insert("Lattice ECP5 LFE5UM-45F", ArchArgs::LFE5UM_45F);
+ arch.insert("Lattice ECP5 LFE5UM-85F", ArchArgs::LFE5UM_85F);
+ arch.insert("Lattice ECP5 LFE5UM5G-25F", ArchArgs::LFE5UM5G_25F);
+ arch.insert("Lattice ECP5 LFE5UM5G-45F", ArchArgs::LFE5UM5G_45F);
+ arch.insert("Lattice ECP5 LFE5UM5G-85F", ArchArgs::LFE5UM5G_85F);
bool ok;
QString item = QInputDialog::getItem(this, "Select new context", "Chip:", arch.keys(), 0, false, &ok);
if (ok && !item.isEmpty()) {
@@ -131,6 +146,22 @@ void MainWindow::load_base_config(std::string filename) actionSaveConfig->setEnabled(true);
}
+void MainWindow::open_lpf()
+{
+ QString fileName = QFileDialog::getOpenFileName(this, QString("Open LPF"), QString(), QString("*.lpf"));
+ if (!fileName.isEmpty()) {
+ std::ifstream in(fileName.toStdString());
+ if (ctx->applyLPF(fileName.toStdString(), in)) {
+ log("Loading LPF successful.\n");
+ actionPack->setEnabled(true);
+ actionLoadLPF->setEnabled(false);
+ } else {
+ actionLoadLPF->setEnabled(true);
+ log("Loading LPF failed.\n");
+ }
+ }
+}
+
void MainWindow::open_base()
{
QString fileName = QFileDialog::getOpenFileName(this, QString("Open Base Config"), QString(), QString("*.config"));
@@ -152,10 +183,19 @@ void MainWindow::save_config() void MainWindow::onDisableActions()
{
+ actionLoadLPF->setEnabled(false);
actionLoadBase->setEnabled(false);
actionSaveConfig->setEnabled(false);
}
+void MainWindow::onJsonLoaded() { actionLoadLPF->setEnabled(true); }
+
void MainWindow::onRouteFinished() { actionLoadBase->setEnabled(true); }
+void MainWindow::onProjectLoaded()
+{
+ if (ctx->settings.find(ctx->id("input/lpf")) != ctx->settings.end())
+ actionLoadLPF->setEnabled(false);
+}
+
NEXTPNR_NAMESPACE_END
diff --git a/gui/ecp5/mainwindow.h b/gui/ecp5/mainwindow.h index f85c2abc..721c6c0b 100644 --- a/gui/ecp5/mainwindow.h +++ b/gui/ecp5/mainwindow.h @@ -38,15 +38,19 @@ class MainWindow : public BaseMainWindow protected:
void onDisableActions() override;
+ void onJsonLoaded() override;
void onRouteFinished() override;
+ void onProjectLoaded() override;
protected Q_SLOTS:
- virtual void new_proj();
+ void new_proj() override;
void newContext(Context *ctx);
+ void open_lpf();
void open_base();
void save_config();
private:
+ QAction *actionLoadLPF;
QAction *actionLoadBase;
QAction *actionSaveConfig;
diff --git a/gui/ecp5/nextpnr.qrc b/gui/ecp5/nextpnr.qrc index 09f96d74..ca7e5b1a 100644 --- a/gui/ecp5/nextpnr.qrc +++ b/gui/ecp5/nextpnr.qrc @@ -1,5 +1,6 @@ <RCC> <qresource prefix="/icons"> + <file>resources/open_lpf.png</file> <file>resources/open_base.png</file> <file>resources/save_config.png</file> </qresource> diff --git a/gui/ecp5/resources/open_base.png b/gui/ecp5/resources/open_base.png Binary files differindex d58d226c..b60cf25a 100644 --- a/gui/ecp5/resources/open_base.png +++ b/gui/ecp5/resources/open_base.png diff --git a/gui/ecp5/resources/open_lpf.png b/gui/ecp5/resources/open_lpf.png Binary files differnew file mode 100644 index 00000000..54b6f6f9 --- /dev/null +++ b/gui/ecp5/resources/open_lpf.png diff --git a/gui/ecp5/resources/save_config.png b/gui/ecp5/resources/save_config.png Binary files differindex 2ade7128..63b5ab56 100644 --- a/gui/ecp5/resources/save_config.png +++ b/gui/ecp5/resources/save_config.png diff --git a/gui/generic/mainwindow.h b/gui/generic/mainwindow.h index a4ce9958..bb6a4cf1 100644 --- a/gui/generic/mainwindow.h +++ b/gui/generic/mainwindow.h @@ -36,7 +36,7 @@ class MainWindow : public BaseMainWindow void createMenu();
protected Q_SLOTS:
- virtual void new_proj();
+ void new_proj() override;
void newContext(Context *ctx);
};
diff --git a/gui/ice40/mainwindow.h b/gui/ice40/mainwindow.h index bb8ed75f..4a9a7d8e 100644 --- a/gui/ice40/mainwindow.h +++ b/gui/ice40/mainwindow.h @@ -44,7 +44,7 @@ class MainWindow : public BaseMainWindow void onProjectLoaded() override;
protected Q_SLOTS:
- virtual void new_proj();
+ void new_proj() override;
void open_pcf();
void save_asc();
diff --git a/gui/ice40/resources/open_pcf.png b/gui/ice40/resources/open_pcf.png Binary files differindex 093dec39..9a4c64d5 100644 --- a/gui/ice40/resources/open_pcf.png +++ b/gui/ice40/resources/open_pcf.png diff --git a/gui/ice40/resources/save_asc.png b/gui/ice40/resources/save_asc.png Binary files differindex 15b59ca1..c3e6b0ab 100644 --- a/gui/ice40/resources/save_asc.png +++ b/gui/ice40/resources/save_asc.png diff --git a/gui/resources/open_json.png b/gui/resources/open_json.png Binary files differindex 90c07267..7352824b 100644 --- a/gui/resources/open_json.png +++ b/gui/resources/open_json.png diff --git a/ice40/cells.cc b/ice40/cells.cc index 886dae2a..fbb77b0c 100644 --- a/ice40/cells.cc +++ b/ice40/cells.cc @@ -230,7 +230,8 @@ std::unique_ptr<CellInfo> create_ice_cell(Context *ctx, IdString type, std::stri new_cell->params[ctx->id("TEST_MODE")] = "0"; add_port(ctx, new_cell.get(), "BYPASS", PORT_IN); - add_port(ctx, new_cell.get(), "DYNAMICDELAY", PORT_IN); + for (int i = 0; i < 8; i++) + add_port(ctx, new_cell.get(), "DYNAMICDELAY_" + std::to_string(i), PORT_IN); add_port(ctx, new_cell.get(), "EXTFEEDBACK", PORT_IN); add_port(ctx, new_cell.get(), "LATCHINPUTVALUE", PORT_IN); add_port(ctx, new_cell.get(), "REFERENCECLK", PORT_IN); @@ -382,6 +383,10 @@ bool is_clock_port(const BaseCtx *ctx, const PortRef &port) port.port == ctx->id("WCLKN"); if (is_sb_mac16(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_DSP")) return port.port == ctx->id("CLK"); + if (is_sb_spram(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_SPRAM")) + return port.port == id_CLOCK; + if (is_sb_io(ctx, port.cell)) + return port.port == id_INPUT_CLK || port.port == id_OUTPUT_CLK; return false; } |
