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-rw-r--r--ecp5/family.cmake2
-rw-r--r--ice40/pack.cc8
2 files changed, 9 insertions, 1 deletions
diff --git a/ecp5/family.cmake b/ecp5/family.cmake
index 2d0a5d66..679325b2 100644
--- a/ecp5/family.cmake
+++ b/ecp5/family.cmake
@@ -19,7 +19,7 @@ add_library(ecp5_chipdb OBJECT ecp5/chipdbs/)
target_compile_definitions(ecp5_chipdb PRIVATE NEXTPNR_NAMESPACE=nextpnr_${family})
target_include_directories(ecp5_chipdb PRIVATE ${family}/)
-if (WIN32)
+if (CMAKE_HOST_WIN32)
set(ENV_CMD ${CMAKE_COMMAND} -E env "PYTHONPATH=\"${TRELLIS_ROOT}/libtrellis\;${TRELLIS_ROOT}/util/common\;${TRELLIS_ROOT}/timing/util\"")
else()
set(ENV_CMD ${CMAKE_COMMAND} -E env "PYTHONPATH=${TRELLIS_ROOT}/libtrellis:${TRELLIS_ROOT}/util/common:${TRELLIS_ROOT}/timing/util")
diff --git a/ice40/pack.cc b/ice40/pack.cc
index 27387a75..a86083b6 100644
--- a/ice40/pack.cc
+++ b/ice40/pack.cc
@@ -265,6 +265,8 @@ static void pack_ram(Context *ctx)
std::unique_ptr<CellInfo> packed =
create_ice_cell(ctx, ctx->id("ICESTORM_RAM"), ci->name.str(ctx) + "_RAM");
packed_cells.insert(ci->name);
+ for (auto attr : ci->attrs)
+ packed->attrs[attr.first] = attr.second;
for (auto param : ci->params)
packed->params[param.first] = param.second;
packed->params[ctx->id("NEG_CLK_W")] =
@@ -388,6 +390,10 @@ static std::unique_ptr<CellInfo> create_padin_gbuf(Context *ctx, CellInfo *cell,
BelId gb_bel;
BelId bel = ctx->getBelByName(ctx->id(cell->attrs[ctx->id("BEL")]));
auto wire = ctx->getBelPinWire(bel, port_name);
+
+ if (wire == WireId())
+ log_error("BEL '%s' has no global buffer connection available\n", ctx->getBelName(bel).c_str(ctx));
+
for (auto src_bel : ctx->getWireBelPins(wire)) {
if (ctx->getBelType(src_bel.bel) == id_SB_GB && src_bel.pin == id_GLOBAL_BUFFER_OUTPUT) {
gb_bel = src_bel.bel;
@@ -991,6 +997,8 @@ static void pack_special(Context *ctx)
std::unique_ptr<CellInfo> packed =
create_ice_cell(ctx, ctx->id("ICESTORM_SPRAM"), ci->name.str(ctx) + "_RAM");
packed_cells.insert(ci->name);
+ for (auto attr : ci->attrs)
+ packed->attrs[attr.first] = attr.second;
for (auto port : ci->ports) {
PortInfo &pi = port.second;
std::string newname = pi.name.str(ctx);