diff options
| -rw-r--r-- | common/nextpnr.cc | 8 | ||||
| -rw-r--r-- | common/timing.cc | 19 | ||||
| -rw-r--r-- | ecp5/pack.cc | 1 |
3 files changed, 25 insertions, 3 deletions
diff --git a/common/nextpnr.cc b/common/nextpnr.cc index f6d873f0..c44cec02 100644 --- a/common/nextpnr.cc +++ b/common/nextpnr.cc @@ -537,15 +537,21 @@ void BaseCtx::addBelToRegion(IdString name, BelId bel) { region[name]->bels.inse void BaseCtx::constrainCellToRegion(IdString cell, IdString region_name) { // Support hierarchical cells as well as leaf ones + bool matched = false; if (hierarchy.count(cell)) { auto &hc = hierarchy.at(cell); for (auto &lc : hc.leaf_cells) constrainCellToRegion(lc.second, region_name); for (auto &hsc : hc.hier_cells) constrainCellToRegion(hsc.second, region_name); + matched = true; } - if (cells.count(cell)) + if (cells.count(cell)) { cells.at(cell)->region = region[region_name].get(); + matched = true; + } + if (!matched) + log_warning("No cell matched '%s' when constraining to region '%s'\n", nameOf(cell), nameOf(region_name)); } DecalXY BaseCtx::constructDecalXY(DecalId decal, float x, float y) { diff --git a/common/timing.cc b/common/timing.cc index 40cbb36e..8322df6d 100644 --- a/common/timing.cc +++ b/common/timing.cc @@ -132,6 +132,18 @@ struct Timing std::vector<IdString> input_ports; std::vector<const PortInfo *> output_ports; + + std::unordered_set<IdString> ooc_port_nets; + + // In out-of-context mode, top-level inputs look floating but aren't + if (bool_or_default(ctx->settings, ctx->id("arch.ooc"))) { + for (auto &p : ctx->ports) { + if (p.second.type != PORT_IN || p.second.net == nullptr) + continue; + ooc_port_nets.insert(p.second.net->name); + } + } + for (auto &cell : ctx->cells) { input_ports.clear(); output_ports.clear(); @@ -177,7 +189,8 @@ struct Timing // the current output port, increment fanin counter for (auto i : input_ports) { DelayInfo comb_delay; - if (cell.second->ports[i].net->driver.cell == nullptr) + NetInfo *i_net = cell.second->ports[i].net; + if (i_net->driver.cell == nullptr && !ooc_port_nets.count(i_net->name)) continue; bool is_path = ctx->getCellDelay(cell.second.get(), i, o->name, comb_delay); if (is_path) @@ -232,7 +245,9 @@ struct Timing // Decrement the fanin count, and only add to topological order if all its fanins have already // been visited auto it = port_fanin.find(&port.second); - NPNR_ASSERT(it != port_fanin.end()); + if (it == port_fanin.end()) + log_error("Timing counted negative fanin count for port %s.%s (net %s), please report this error.\n", + ctx->nameOf(usr.cell), ctx->nameOf(port.first), ctx->nameOf(port.second.net)); if (--it->second == 0) { topological_order.emplace_back(port.second.net); queue.emplace_back(port.second.net); diff --git a/ecp5/pack.cc b/ecp5/pack.cc index 83ffc223..fa92cc15 100644 --- a/ecp5/pack.cc +++ b/ecp5/pack.cc @@ -2956,6 +2956,7 @@ class Ecp5Packer pack_remaining_ffs(); generate_constraints(); promote_ecp5_globals(ctx); + ctx->fixupHierarchy(); ctx->check(); } |