diff options
Diffstat (limited to 'fpga_interchange/chipdb.h')
-rw-r--r-- | fpga_interchange/chipdb.h | 76 |
1 files changed, 75 insertions, 1 deletions
diff --git a/fpga_interchange/chipdb.h b/fpga_interchange/chipdb.h index d38e5d2f..155c2bb2 100644 --- a/fpga_interchange/chipdb.h +++ b/fpga_interchange/chipdb.h @@ -34,7 +34,7 @@ NEXTPNR_NAMESPACE_BEGIN * kExpectedChipInfoVersion */ -static constexpr int32_t kExpectedChipInfoVersion = 9; +static constexpr int32_t kExpectedChipInfoVersion = 10; // Flattened site indexing. // @@ -332,6 +332,76 @@ NPNR_PACKED_STRUCT(struct GlobalCellPOD { RelSlice<GlobalCellPinPOD> pins; }); +NPNR_PACKED_STRUCT(struct MacroParameterPOD { + int32_t key; // constid + int32_t value; // constid +}); + +enum MacroParamRuleType +{ + PARAM_MAP_COPY = 0, // copy parameter value + PARAM_MAP_SLICE = 1, // take a slice of bits + PARAM_MAP_TABLE = 2, // lookup strings in table +}; + +NPNR_PACKED_STRUCT(struct MacroParamMapRulePOD { + // name of parameter on parent primitive + int32_t prim_param; // constid + // name of instance to set parameter on + int32_t inst_name; // constid + // name of parameter on macro expansion instance + int32_t inst_param; // constid + // type of mapping to use to derive new value + int32_t rule_type; // MacroParamRuleType + // for slice mappings, the bits to collect + RelSlice<uint32_t> slice_bits; + // for table mappings, the lookup table to use + RelSlice<MacroParameterPOD> map_table; +}); + +NPNR_PACKED_STRUCT(struct MacroCellInstPOD { + int32_t name; // instance name constid + int32_t type; // instance type constid + // parameters to set on cell + RelSlice<MacroParameterPOD> parameters; +}); + +NPNR_PACKED_STRUCT(struct MacroPortInstPOD { + // name of the cell instance the port is on; or 0/'' for top level ports + int32_t instance; + // name of the port + int32_t port; + // direction of the port + int32_t dir; +}); + +NPNR_PACKED_STRUCT(struct MacroNetPOD { + // name of the net + int32_t name; + // ports on the net + RelSlice<MacroPortInstPOD> ports; +}); + +NPNR_PACKED_STRUCT(struct MacroPOD { + // macro name + int32_t name; + // cell instances inside macro + RelSlice<MacroCellInstPOD> cell_insts; + // nets inside macro + RelSlice<MacroNetPOD> nets; +}); + +NPNR_PACKED_STRUCT(struct MacroExpansionPOD { + // primitive name to match + int32_t prim_name; + // macro name to expand to + int32_t macro_name; + // list of parameters to (optionally) match + RelSlice<MacroParameterPOD> param_matches; + // how to derive parameters for expansion instances + RelSlice<MacroParamMapRulePOD> param_rules; +}); + NPNR_PACKED_STRUCT(struct ChipInfoPOD { RelPtr<char> name; RelPtr<char> generator; @@ -347,6 +417,10 @@ NPNR_PACKED_STRUCT(struct ChipInfoPOD { RelSlice<WireTypePOD> wire_types; RelSlice<GlobalCellPOD> global_cells; + // Macro related data + RelSlice<MacroPOD> macros; + RelSlice<MacroExpansionPOD> macro_rules; + // BEL bucket constids. RelSlice<int32_t> bel_buckets; |