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-rw-r--r--fpga_interchange/arch.h13
-rw-r--r--fpga_interchange/archdefs.h2
2 files changed, 15 insertions, 0 deletions
diff --git a/fpga_interchange/arch.h b/fpga_interchange/arch.h
index da620699..c7d2544f 100644
--- a/fpga_interchange/arch.h
+++ b/fpga_interchange/arch.h
@@ -835,6 +835,19 @@ struct Arch : ArchAPI<ArchRanges>
return get_site_status(tile_status, bel_data).checkSiteRouting(getCtx(), tile_status);
}
+ // -------------------------------------------------
+
+ // TODO
+ CellInfo *getClusterRootCell(ClusterId cluster) const override { NPNR_ASSERT_FALSE("unimplemented"); }
+ ArcBounds getClusterBounds(ClusterId cluster) const override { NPNR_ASSERT_FALSE("unimplemented"); }
+ Loc getClusterOffset(const CellInfo *cell) const override { NPNR_ASSERT_FALSE("unimplemented"); }
+ bool isClusterStrict(const CellInfo *cell) const override { NPNR_ASSERT_FALSE("unimplemented"); }
+ bool getClusterPlacement(ClusterId cluster, BelId root_bel,
+ std::vector<std::pair<CellInfo *, BelId>> &placement) const override
+ {
+ NPNR_ASSERT_FALSE("unimplemented");
+ }
+
IdString get_bel_tiletype(BelId bel) const { return IdString(loc_info(chip_info, bel).name); }
std::unordered_map<WireId, Loc> sink_locs, source_locs;
diff --git a/fpga_interchange/archdefs.h b/fpga_interchange/archdefs.h
index 23bff4f3..c145b893 100644
--- a/fpga_interchange/archdefs.h
+++ b/fpga_interchange/archdefs.h
@@ -98,6 +98,8 @@ struct BelBucketId
bool operator<(const BelBucketId &other) const { return name < other.name; }
};
+typedef IdString ClusterId;
+
struct SiteExpansionLoop;
struct ArchNetInfo