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-rw-r--r--ice40/arch_place.cc13
1 files changed, 7 insertions, 6 deletions
diff --git a/ice40/arch_place.cc b/ice40/arch_place.cc
index 25044525..7b79e031 100644
--- a/ice40/arch_place.cc
+++ b/ice40/arch_place.cc
@@ -58,11 +58,11 @@ bool PlaceValidityChecker::logicCellsCompatible(
clk = get_net_or_empty(cell, id_clk);
sr = get_net_or_empty(cell, id_sr);
- if (!is_global_net(ctx, cen) && cen != nullptr)
+ if (!ctx->isGlobalNet(cen) && cen != nullptr)
locals_count++;
- if (!is_global_net(ctx, clk) && clk != nullptr)
+ if (!ctx->isGlobalNet(clk) && clk != nullptr)
locals_count++;
- if (!is_global_net(ctx, sr) && sr != nullptr)
+ if (!ctx->isGlobalNet(sr) && sr != nullptr)
locals_count++;
if (bool_or_default(cell->params, id_neg_clk)) {
@@ -139,8 +139,9 @@ bool PlaceValidityChecker::isValidBelForCell(CellInfo *cell, BelId bel)
return ctx->getBelPackagePin(bel) != "";
} else if (cell->type == id_sb_gb) {
bool is_reset = false, is_cen = false;
- assert(cell->ports.at("GLOBAL_BUFFER_OUTPUT").net != nullptr);
- for (auto user : cell->ports.at("GLOBAL_BUFFER_OUTPUT").net->users) {
+ assert(cell->ports.at(ctx->id("GLOBAL_BUFFER_OUTPUT")).net != nullptr);
+ for (auto user :
+ cell->ports.at(ctx->id("GLOBAL_BUFFER_OUTPUT")).net->users) {
if (is_reset_port(ctx, user))
is_reset = true;
if (is_enable_port(ctx, user))
@@ -148,7 +149,7 @@ bool PlaceValidityChecker::isValidBelForCell(CellInfo *cell, BelId bel)
}
IdString glb_net = ctx->getWireName(
ctx->getWireBelPin(bel, PIN_GLOBAL_BUFFER_OUTPUT));
- int glb_id = std::stoi(std::string("") + glb_net.str().back());
+ int glb_id = std::stoi(std::string("") + glb_net.str(ctx).back());
if (is_reset && is_cen)
return false;
else if (is_reset)