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-rw-r--r--ice40/arch.cc20
-rw-r--r--ice40/arch.h2
-rw-r--r--ice40/chipdb.py2
3 files changed, 19 insertions, 5 deletions
diff --git a/ice40/arch.cc b/ice40/arch.cc
index 7addc0a1..69848aff 100644
--- a/ice40/arch.cc
+++ b/ice40/arch.cc
@@ -333,7 +333,21 @@ PipId Arch::getPipByName(IdString name) const
IdString Arch::getPipName(PipId pip) const
{
NPNR_ASSERT(pip != PipId());
+
+#if 1
+ int x = chip_info->pip_data[pip.index].x;
+ int y = chip_info->pip_data[pip.index].y;
+
+ std::string src_name = chip_info->wire_data[chip_info->pip_data[pip.index].src].name.get();
+ std::replace(src_name.begin(), src_name.end(), '/', '.');
+
+ std::string dst_name = chip_info->wire_data[chip_info->pip_data[pip.index].dst].name.get();
+ std::replace(dst_name.begin(), dst_name.end(), '/', '.');
+
+ return id("X" + std::to_string(x) + "/Y" + std::to_string(y) + "/" + src_name + ".->." + dst_name);
+#else
return id(chip_info->pip_data[pip.index].name.get());
+#endif
}
// -----------------------------------------------------------------------
@@ -470,9 +484,9 @@ DecalXY Arch::getWireDecal(WireId wire) const
DecalXY Arch::getPipDecal(PipId pip) const
{
DecalXY decalxy;
- decalxy.decal.type = DecalId::TYPE_PIP;
- decalxy.decal.index = pip.index;
- decalxy.decal.active = pip_to_net.at(pip.index) != IdString();
+ // decalxy.decal.type = DecalId::TYPE_PIP;
+ // decalxy.decal.index = pip.index;
+ // decalxy.decal.active = pip_to_net.at(pip.index) != IdString();
return decalxy;
};
diff --git a/ice40/arch.h b/ice40/arch.h
index a84736d8..5dab414b 100644
--- a/ice40/arch.h
+++ b/ice40/arch.h
@@ -63,7 +63,7 @@ NPNR_PACKED_STRUCT(struct BelPortPOD {
});
NPNR_PACKED_STRUCT(struct PipInfoPOD {
- RelPtr<char> name;
+ // RelPtr<char> name;
int32_t src, dst;
int32_t delay;
int8_t x, y;
diff --git a/ice40/chipdb.py b/ice40/chipdb.py
index 38e60d0a..698cd173 100644
--- a/ice40/chipdb.py
+++ b/ice40/chipdb.py
@@ -1107,7 +1107,7 @@ for info in pipinfo:
dst_seg = gfx_wire_ids["TILE_WIRE_" + dst_segname.upper().replace("/", "_")]
dst_segname = dst_segname.replace("/", ".")
- bba.s("X%d/Y%d/%s->%s" % (info["x"], info["y"], src_segname, dst_segname), "name")
+ # bba.s("X%d/Y%d/%s->%s" % (info["x"], info["y"], src_segname, dst_segname), "name")
bba.u32(info["src"], "src")
bba.u32(info["dst"], "dst")
bba.u32(info["delay"], "delay")