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-rw-r--r--ice40/chipdb.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/ice40/chipdb.py b/ice40/chipdb.py
index 00194deb..97bc3183 100644
--- a/ice40/chipdb.py
+++ b/ice40/chipdb.py
@@ -389,8 +389,8 @@ with open(args.filename, "r") as f:
wire_xy[mode[1]].append((int(line[0]), int(line[1])))
if mode[1] not in wire_segments:
wire_segments[mode[1]] = set()
- if ("TILE_WIRE_" + wname[2].upper()) in gfx_wire_ids:
- wire_segments[mode[1]].add((wname[0], wname[1], gfx_wire_ids["TILE_WIRE_" + wname[2].upper()]))
+ if ("TILE_WIRE_" + wname[2].upper().replace("/", "_")) in gfx_wire_ids:
+ wire_segments[mode[1]].add((wname[0], wname[1], gfx_wire_ids["TILE_WIRE_" + wname[2].upper().replace("/", "_")]))
continue
if mode[0] in ("buffer", "routing"):