| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Unbreak CI | gatecat | 2022-12-02 | 1 | -5/+5 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | gowin: update the apicula version | YRabbit | 2022-12-02 | 1 | -1/+1 |
| | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou> | ||||
| * | Fix python version in CI | Miodrag Milanovic | 2022-10-24 | 1 | -1/+2 |
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| * | Update CI script | Miodrag Milanovic | 2022-10-24 | 1 | -6/+6 |
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| * | Disable broken and failing interchange CI | gatecat | 2022-06-21 | 1 | -0/+0 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | ci: Restructure and move entirely to GH actions from Cirrus | gatecat | 2022-04-08 | 2 | -29/+95 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Updated CLK mux select name | gatecat | 2022-03-18 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Merge pull request #953 from YosysHQ/gatecat/mistral-updates | gatecat | 2022-03-18 | 1 | -1/+1 |
| |\ | | | | | mistral: Update to latest upstream | ||||
| | * | mistral: Update to latest upstream | gatecat | 2022-03-17 | 1 | -1/+1 |
| | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | | ci: Fixes for latest RapidWright | gatecat | 2022-03-17 | 1 | -1/+1 |
| |/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Mistral: fix gpio OE, add hmc bypass support | Olivier Galibert | 2022-01-18 | 1 | -1/+1 |
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| * | Sync with the current state of mistral | Olivier Galibert | 2022-01-18 | 1 | -1/+1 |
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| * | mistral: Update to latest enum name | gatecat | 2021-12-22 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Bump CI version | gatecat | 2021-12-12 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Add 'tools' dir to include path | gatecat | 2021-12-11 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Sync with yet another reorganization | Olivier Galibert | 2021-10-28 | 1 | -1/+1 |
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| * | interchange: Bump prjoxide version | gatecat | 2021-10-20 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | mistral: Use the iterators | Olivier Galibert | 2021-10-19 | 1 | -1/+1 |
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| * | Sync mistral version in CI | Olivier Galibert | 2021-10-17 | 1 | -1/+1 |
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| * | Update python-fpga-interchange to v0.0.20 | Maciej Dudek | 2021-09-23 | 1 | -1/+1 |
| | | | | | Signed-off-by: Maciej Dudek <mdudek@antmicro.com> | ||||
| * | gh: interchange: bump python-interchange tag | Alessandro Comodi | 2021-08-31 | 1 | -1/+1 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | mistral: Include mistral generated files in include dirs | gatecat | 2021-08-15 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | [interchange] Update chipdb and python-fpga-interchange versions | Maciej Dudek | 2021-07-14 | 1 | -1/+1 |
| | | | | | Signed-off-by: Maciej Dudek <mdudek@antmicro.com> | ||||
| * | interchange: bump python-interchange version | Alessandro Comodi | 2021-07-08 | 1 | -1/+1 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | interchange: Bump versions | gatecat | 2021-06-15 | 1 | -2/+2 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: ci: update python-interchange tag | Alessandro Comodi | 2021-06-11 | 1 | -1/+1 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | ci: Bump mistral version | gatecat | 2021-06-05 | 1 | -5/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Add LIFCL-40 EVN tests | gatecat | 2021-06-01 | 1 | -2/+2 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Bump versions | gatecat | 2021-05-27 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Bump versions | gatecat | 2021-05-21 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | gh-actions: interchange: use commit sha as cache key | Alessandro Comodi | 2021-05-20 | 1 | -4/+10 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | ci: Use GH only for Mistral and fpga-interchange | gatecat | 2021-05-15 | 1 | -0/+33 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Bump version | gatecat | 2021-05-07 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Bump versions | gatecat | 2021-04-30 | 1 | -2/+2 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Bump versions | gatecat | 2021-04-20 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | gh-actions: increase python-fpga-interchange tag version | Alessandro Comodi | 2021-04-14 | 1 | -1/+1 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | interchange: Pin prjoxide commit | gatecat | 2021-04-09 | 1 | -0/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Don't fail-fast for GH actions to allow for easier CI debugging. | Keith Rothman | 2021-04-06 | 1 | -0/+3 |
| | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
| * | [interchange] Update interchange CI for new chipdb change. | Keith Rothman | 2021-04-01 | 1 | -2/+1 |
| | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
| * | ci: Build prjoxide only for LIFCL | gatecat | 2021-03-30 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Add Nexus LUT test | gatecat | 2021-03-30 | 1 | -1/+1 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Add Nexus to CI | gatecat | 2021-03-30 | 1 | -1/+2 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | gh-actions: better yosys caching based on version | Alessandro Comodi | 2021-03-26 | 1 | -4/+33 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | interchange: add archcheck tests to all-device-test target | Alessandro Comodi | 2021-03-26 | 1 | -2/+0 |
| | | | | | | | | This increases parallelism and should make the FPGA interchange CI faster Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | gh-actions: use ccache and build tools before running tests | Alessandro Comodi | 2021-03-25 | 1 | -1/+62 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | gh-actions: interchange: multiple jobs, one for each device | Alessandro Comodi | 2021-03-24 | 1 | -5/+10 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | gh-actions: remove multi-process arch generation | Alessandro Comodi | 2021-03-23 | 1 | -1/+1 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | fpga_interchange: address review comments | Alessandro Comodi | 2021-03-16 | 1 | -2/+4 |
| | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | github-actions: add basic CI to test FPGA interchange | Alessandro Comodi | 2021-03-16 | 1 | -0/+27 |
| Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | |||||
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