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* Refactoring of router1Clifford Wolf2018-07-212-87/+320
| | | | | | | | | - Use source-sink pairs as jobs, not whole nets - Route nets with smallest slack first - Preserve routes for already routed source-sink pairs - Add small incentive for re-using wires Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix minor issue in GUI Wire propertiesClifford Wolf2018-07-211-2/+2
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Change DelayInfo semantics to what we actually needClifford Wolf2018-07-215-16/+38
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add getWireDelay APIClifford Wolf2018-07-214-2/+17
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix warnings and statusMiodrag Milanovic2018-07-213-4/+21
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* Made save project work as wellMiodrag Milanovic2018-07-215-11/+46
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* made open project to workMiodrag Milanovic2018-07-211-2/+73
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* fix introduced bugMiodrag Milanovic2018-07-211-0/+2
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* make new context work againMiodrag Milanovic2018-07-201-0/+3
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* Bind wires to netMiodrag Milanovic2018-07-201-629/+637
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* Merge branch 'gridapi' into 'master'David Shah2018-07-206-17/+115
|\ | | | | | | | | Gridapi See merge request SymbioticEDA/nextpnr!11
| * Add Location APIs to generic archClifford Wolf2018-07-205-24/+49
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * Improve iCE40 and common Loc codeClifford Wolf2018-07-204-15/+52
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into gridapiClifford Wolf2018-07-2050-872/+911
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* | Few more checks on parameters and error eolMiodrag Milanovic2018-07-202-7/+17
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* | Start adding bitstream reading for ice40Miodrag Milanovic2018-07-204-43/+143
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* | ice40: Optimise reset/enable net checkingDavid Shah2018-07-203-11/+14
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ice40: Trim DSP inputs that are constant where appropriateDavid Shah2018-07-192-2/+10
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ice40: Packer and bitstream gen support for MAC16sDavid Shah2018-07-193-3/+111
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ice40: Adding cell definition for DSPsDavid Shah2018-07-195-7/+80
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ice40: Add virtual padin wires for intoscs and GB_IOsDavid Shah2018-07-191-1/+14
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | Reducing performance cost of assertsDavid Shah2018-07-192-9/+11
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ice40: Adding data for extra cell configurationDavid Shah2018-07-192-4/+39
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | Fix click on wire in net sectionMiodrag Milanovic2018-07-181-1/+1
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* | cell and net now can be selected, fixed issue with highlightMiodrag Milanovic2018-07-181-19/+15
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* | added clear action for browsing historyMiodrag Milanovic2018-07-184-0/+18
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* | removed not used and buggy featuresMiodrag Milanovic2018-07-1813-474/+0
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* | ecp5: Tidying up examplesDavid Shah2018-07-1810-265/+40
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ecp5: Add support for pin name constraints using 'LOC' attributesDavid Shah2018-07-185-15/+64
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ecp5: Adding PIO data to chipdbDavid Shah2018-07-182-0/+101
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ice40: RenamingDavid Shah2018-07-184-9/+9
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ice40: Fixes for inverted clocksDavid Shah2018-07-183-2/+7
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | Cleanups in iCE40 blinky and picorv32 testsClifford Wolf2018-07-184-35/+2
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Add Net/Cell "udata" fieldClifford Wolf2018-07-181-0/+4
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | ice40: Use xArchArgs in validity checkDavid Shah2018-07-184-39/+39
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ice40: Make assignArchArgs a Arch method; call also after legaliserDavid Shah2018-07-184-31/+37
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ice40: Assign ArchArgs after packingDavid Shah2018-07-187-14/+63
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ecp5: Simple packer workingDavid Shah2018-07-184-16/+78
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ecp5: Add simple constant packerDavid Shah2018-07-183-2/+98
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ecp5: Function to handle constant LUT inputsDavid Shah2018-07-171-0/+26
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | Add ArchNetInfo and ArchCellInfoClifford Wolf2018-07-174-3/+11
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | proper fixMiodrag Milanovic2018-07-171-3/+2
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| * Add Loc struct for x/y/z bel locationsClifford Wolf2018-07-172-2/+38
|/ | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* ecp5: Fixing packer bugsDavid Shah2018-07-174-10/+29
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnrDavid Shah2018-07-171-0/+2
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| * remove non working codeMiodrag Milanovic2018-07-171-0/+2
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* | ecp5: Adding a slow and conservative placement validity checkerDavid Shah2018-07-173-7/+129
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ecp5: FF packerDavid Shah2018-07-171-1/+19
|/ | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ecp5: LUT packerDavid Shah2018-07-173-19/+95
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ecp5: Working on packer LUT pairing functionalityDavid Shah2018-07-171-0/+120
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
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