Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | | [interchange] Update chipdb and python-fpga-interchange versions | Maciej Dudek | 2021-07-14 | 2 | -2/+2 | |
|/ / | | | | | | | Signed-off-by: Maciej Dudek <mdudek@antmicro.com> | |||||
* | | Merge pull request #761 from acomodi/interchange-constrs | gatecat | 2021-07-12 | 5 | -13/+174 | |
|\ \ | | | | | | | interchange: add user placement constraints handling | |||||
| * | | interchange: xdc and place constr: address review comments | Alessandro Comodi | 2021-07-12 | 3 | -23/+13 | |
| | | | | | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | |||||
| * | | interchange: xdc: add get_cells command | Alessandro Comodi | 2021-07-12 | 1 | -13/+70 | |
| | | | | | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | |||||
| * | | interchange: add constraints constraints application routine | Alessandro Comodi | 2021-07-12 | 4 | -0/+114 | |
|/ / | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | |||||
* | | Merge pull request #760 from YosysHQ/gatecat/xcup-ibufds | gatecat | 2021-07-12 | 2 | -5/+16 | |
|\ \ | | | | | | | interchange: Support for UltraScale+ differential input buffers | |||||
| * | | interchange: Skip IO ports in dedicated routing check | gatecat | 2021-07-12 | 1 | -0/+8 | |
| | | | | | | | | | | | | | | | | | | These have already been dealt with in arch_pack_io Signed-off-by: gatecat <gatecat@ds0.me> | |||||
| * | | interchange: Debug IO port validity check failures | gatecat | 2021-07-12 | 2 | -3/+5 | |
| | | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | |||||
| * | | interchange: Place DIFFINBUF and IBUFCTRL for UltraScale+ IBUFDS | gatecat | 2021-07-12 | 1 | -3/+4 | |
|/ / | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | |||||
* | | Merge pull request #759 from pepijndevos/gw1ndb | gatecat | 2021-07-11 | 1 | -1/+8 | |
|\ \ | | | | | | | GW1NR is not a seperate family, but GW1NS is | |||||
| * | | GW1NR is not a seperate family, but GW1NS is | Pepijn de Vos | 2021-07-11 | 1 | -1/+8 | |
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* | | Merge pull request #758 from YosysHQ/gatecat/hist-oob | gatecat | 2021-07-11 | 1 | -1/+6 | |
|\ \ | | | | | | | timing: Fix out-of-bounds histogram bins in all cases | |||||
| * | | timing: Fix out-of-bounds histogram bins in all cases | gatecat | 2021-07-10 | 1 | -1/+6 | |
|/ / | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | |||||
* | | Merge branch 'master' of github.com:YosysHQ/nextpnr | gatecat | 2021-07-10 | 6 | -23/+93 | |
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| * \ | Merge pull request #755 from yrabbit/io_port | gatecat | 2021-07-08 | 1 | -16/+24 | |
| |\ \ | | | | | | | | | Pin modes parser | |||||
| | * | | Fix the boolean. | YRabbit | 2021-07-08 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou> | |||||
| | * | | Fix formating | YRabbit | 2021-07-07 | 1 | -24/+24 | |
| | | | | | | | | | | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou> | |||||
| | * | | Fix boolean value. | YRabbit | 2021-07-07 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou> | |||||
| | * | | Merge branch 'master' into io_port | YRabbit | 2021-07-07 | 18 | -78/+201 | |
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| | * | | Wip parser | YRabbit | 2021-07-07 | 1 | -16/+4 | |
| | | | | | | | | | | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou> | |||||
| | * | | Parser | YRabbit | 2021-07-05 | 1 | -0/+9 | |
| | | | | | | | | | | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou> | |||||
| | * | | Merge branch 'master' into io_port | YRabbit | 2021-07-03 | 1 | -2/+13 | |
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| | * | | | Fix parser. Comments and IO_PORT | YRabbit | 2021-07-03 | 1 | -11/+9 | |
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou> | |||||
| | * | | | Syntax | YRabbit | 2021-07-02 | 1 | -3/+3 | |
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou> | |||||
| | * | | | Add IO_PORT parsing | YRabbit | 2021-07-02 | 1 | -14/+27 | |
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou> | |||||
| * | | | | Merge pull request #756 from acomodi/fix-clustering-runtime | gatecat | 2021-07-08 | 5 | -7/+69 | |
| |\ \ \ \ | | | | | | | | | | | | | interchange: reduce run-time to check dedicated interconnect | |||||
| | * | | | | interchange: bump python-interchange version | Alessandro Comodi | 2021-07-08 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | |||||
| | * | | | | interchange: update chipdb version | Alessandro Comodi | 2021-07-08 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | |||||
| | * | | | | interchange: reduce run-time to check dedicated interconnect | Alessandro Comodi | 2021-07-08 | 4 | -5/+67 | |
| |/ / / / | | | | | | | | | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | |||||
* / / / / | ice40: Fix order of values in error | gatecat | 2021-07-10 | 1 | -1/+1 | |
|/ / / / | | | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | |||||
* | | / | clangformat | gatecat | 2021-07-08 | 1 | -2/+1 | |
| |_|/ |/| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | |||||
* | | | Merge pull request #751 from trabucayre/gw1ns-2 | gatecat | 2021-07-06 | 3 | -7/+8 | |
|\ \ \ | | | | | | | | | add support for GW1NS-2 family | |||||
| * | | | .cirrus/Dockerfile.ubuntu20.04: update apycula to 0.0.1a9 | Gwenhael Goavec-Merou | 2021-07-06 | 1 | -1/+1 | |
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| * | | | add support for GW1NS-2 family | Gwenhael Goavec-Merou | 2021-07-06 | 2 | -6/+7 | |
| | |/ | |/| | | | | | | | Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com> | |||||
* | | | Merge pull request #754 from YosysHQ/gatecat/ecp5-dcs | gatecat | 2021-07-06 | 4 | -11/+55 | |
|\ \ \ | | | | | | | | | ecp5: Add DCSC support | |||||
| * | | | ecp5: Add DCSC support | gatecat | 2021-07-06 | 4 | -11/+55 | |
| |/ / | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | |||||
* | | | Merge pull request #752 from YosysHQ/gatecat/du-mem-error | gatecat | 2021-07-06 | 1 | -1/+2 | |
|\ \ \ | | | | | | | | | design_utils: Fix memory error | |||||
| * | | | design_utils: Fix memory error | gatecat | 2021-07-06 | 1 | -1/+2 | |
| |/ / | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | |||||
* | | | Merge pull request #750 from YosysHQ/gatecat/io-improve | gatecat | 2021-07-06 | 10 | -59/+136 | |
|\ \ \ | |/ / |/| | | IO improvements for OBUFTDS | |||||
| * | | interchange: Allow pseudo pip wires to overlap with bound site wires on the ↵ | gatecat | 2021-07-06 | 3 | -17/+13 | |
| | | | | | | | | | | | | | | | | | | same net Signed-off-by: gatecat <gatecat@ds0.me> | |||||
| * | | router2: Dump pre-bound routes when routing fails in debug mode | gatecat | 2021-07-06 | 1 | -1/+11 | |
| | | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | |||||
| * | | interchange: Improve search for PAD-attached bels | gatecat | 2021-07-06 | 2 | -41/+32 | |
| | | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | |||||
| * | | interchange: tests: add obuftds test | Alessandro Comodi | 2021-07-06 | 6 | -0/+80 | |
|/ / | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | |||||
* | | Merge pull request #748 from acomodi/fix-phys-net-writing | gatecat | 2021-07-02 | 1 | -2/+13 | |
|\ \ | |/ |/| | interchange: phys: skip only nets writing on disconnected out ports | |||||
| * | interchange: phys: skip only nets writing on disconnected out ports | Alessandro Comodi | 2021-07-02 | 1 | -2/+13 | |
|/ | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | |||||
* | Merge pull request #747 from cr1901/machxo2 | gatecat | 2021-07-01 | 9 | -13/+140 | |
|\ | | | | | MachXO2 Checkpoint 1 | |||||
| * | machxo2: Fix packing for directly-connected DFFs. | William D. Jones | 2021-07-01 | 3 | -9/+28 | |
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| * | machxo2: Add VHDL primitives, demo, and script. | William D. Jones | 2021-07-01 | 4 | -0/+81 | |
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| * | machxo2: Add a special case for pips whose config bits are in multiple | William D. Jones | 2021-07-01 | 1 | -0/+12 | |
| | | | | | | | | tiles. | |||||
| * | machxo2: Hardcode a rule for emitting U_/D_ or G_ prefixes in ASCII output. | William D. Jones | 2021-07-01 | 1 | -2/+17 | |
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