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| * | | | | Merge remote-tracking branch 'origin/master' into regressionsEddie Hung2019-02-075-10/+23
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| * | | | | | [test] Update submodule pointerEddie Hung2019-02-071-0/+0
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| * | | | | | [tests] Move existing tests/* into submodule nextpnr-testsEddie Hung2019-02-0711-813/+3
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* | | | | | | Merge pull request #231 from YosysHQ/mmaped_chipdbMiodrag Milanović2019-02-127-153/+221
|\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | Load chipdb from filesystem as option
| * \ \ \ \ \ \ Merge branch 'master' into mmaped_chipdbMiodrag Milanović2019-02-124-8/+42
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* | | | | | | | Merge pull request #234 from YosysHQ/issue233Eddie Hung2019-02-121-1/+1
|\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | [timing] Fix off-by-one error
| * | | | | | | | [timing] Fix off-by-one errorEddie Hung2019-02-111-1/+1
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* / | | | | | | ecp5: Fix global routing performanceDavid Shah2019-02-121-1/+22
|/ / / / / / / | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | | | | | | Merge pull request #223 from gsomlo/gls-pytrellis-cmakeDavid Shah2019-02-101-4/+11
|\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | ecp5: cmake: Search for pytrellis.so in multiple locations
| * | | | | | | ecp5: cmake: Search for pytrellis.so in multiple locationsGabriel L. Somlo2019-02-101-4/+11
|/ / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a distro-specific "trellis-devel" package is used, the pytrellis.so library might be located in a dedicated directory, rather than under TRELLIS_ROOT. Search for pytrellis.so in a list of directories, then subsequently use the first match as part of PYTHONPATH. Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
* | | | | | | Merge pull request #232 from YosysHQ/err145David Shah2019-02-091-0/+2
|\ \ \ \ \ \ \ | |_|_|_|/ / / |/| | | | / / | | |_|_|/ / | |/| | | | ice40: PLLs can't conflict with themselves
| * | | | | ice40: PLLs can't conflict with themselvesDavid Shah2019-02-091-0/+2
|/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | Fixes error building testcase from #145 Signed-off-by: David Shah <dave@ds0.me>
* | | | | Merge pull request #226 from YosysHQ/190207Eddie Hung2019-02-091-2/+1
|\ \ \ \ \ | | | | | | | | | | | | Fix slack_histogram computation accessing num_bins+1
| * | | | | Remove regressions; see PR#227 of where it will end upEddie Hung2019-02-074-5552/+0
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| * | | | | Rename from date to pr numberEddie Hung2019-02-072-0/+0
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| * | | | | Add to regressionsEddie Hung2019-02-074-0/+5552
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| * | | | | Fix slack_histogram computation accessing num_bins+1Eddie Hung2019-02-071-2/+1
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* | | | | Merge pull request #230 from YosysHQ/fix229David Shah2019-02-091-1/+6
|\ \ \ \ \ | |_|_|_|/ |/| | | | ice40: Don't create PLLOUT_B buffer for single-output PLL variants
| * | | | ice40: Don't create PLLOUT_B buffer for single-output PLL variantsDavid Shah2019-02-091-1/+6
|/ / / / | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| | * | Fix according to comments on PRMiodrag Milanovic2019-02-103-4/+4
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| | * | Load chipdb from filesystem as optionMiodrag Milanovic2019-02-097-149/+217
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* | | clangformatDavid Shah2019-02-082-2/+2
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | | Merge branch 'ecp5func'David Shah2019-02-087-4/+170
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| * | ecp5: Adding DTR, OSCG, CLKDIVF, USRMCLK, JTAGGDavid Shah2019-02-085-2/+157
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | router1: Print route timeDavid Shah2019-01-301-0/+4
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | placer1: Add place time printDavid Shah2019-01-301-2/+9
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | | Better resize, FPGAViewWidget minimal is now 320x200, fixes #222Miodrag Milanovic2019-02-071-1/+1
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* | | Fix reading conflicting wire in GUI for pips, fixes #225Miodrag Milanovic2019-02-071-2/+6
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* | | timing: Add --ignore-loops optionDavid Shah2019-02-052-1/+7
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | | Merge pull request #220 from YosysHQ/coi3Eddie Hung2019-01-291-6/+9
|\ \ \ | |_|/ |/| | ice40: Add budget override for CO->I3 path
| * | [ice40] Refactor Arch::getBudgetOverride()Eddie Hung2019-01-291-29/+9
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| * | ice40: Add budget override for CO->I3 pathDavid Shah2019-01-271-0/+23
| |/ | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Merge pull request #217 from YosysHQ/timingfixesDavid Shah2019-01-273-8/+34
|\ \ | | | | | | [timing] Path related fixes
| * | timing: Path related fixesDavid Shah2019-01-273-8/+34
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | | Merge pull request #210 from twam/masterDavid Shah2019-01-271-3/+3
|\ \ \ | |_|/ |/| | Search for trellis in /usr/local/share/trellis if not specified with …
| * | Search for trellis in /usr/local/share/trellis if not specified with ↵Tobias Müller2019-01-131-3/+3
| | | | | | | | | | | | -DTRELLIS_ROOT
* | | Make cross compile possible for mingwMiodrag Milanovic2019-01-271-1/+1
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* | Merge pull request #211 from smunaut/ice40_ram_attrsDavid Shah2019-01-211-0/+4
|\ \ | | | | | | ice40/pack: Copy attributes to packed cell
| * | ice40/pack: Copy attributes to packed RAM cellsSylvain Munaut2019-01-191-0/+4
| | | | | | | | | | | | | | | | | | | | | Useful to allow manual placement of SPRAM/EBR using BEL attribute for instance Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
* | | Merge pull request #213 from smunaut/ice40_gbuf_errmsgDavid Shah2019-01-211-0/+4
|\ \ \ | |_|/ |/| | ice40: Add error message if a selected site is not Global Buffer capable
| * | ice40: Add error message if a selected site is not Global Buffer capableSylvain Munaut2019-01-181-0/+4
|/ / | | | | | | | | | | ... rather than assert()-out during the call to getWireBelPins() call Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
* | Merge pull request #205 from YosysHQ/ice40_io_tmgDavid Shah2019-01-082-3/+67
|\| | | | | ice40: Add timing data for all IO modes
| * ice40: Add timing data for all IO modesDavid Shah2019-01-072-3/+67
|/ | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add PULLMODE supportDavid Shah2019-01-071-0/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Merge pull request #197 from YosysHQ/fix_192David Shah2019-01-011-14/+14
|\ | | | | command: Setup logging before attempting to create Context
| * command: Setup logging before attempting to create ContextDavid Shah2018-12-261-14/+14
| | | | | | | | | | | | | | This way errors (such as an invalid package type) occurring during Context creation are printed properly. Signed-off-by: David Shah <dave@ds0.me>
* | Merge pull request #196 from YosysHQ/pio_errorDavid Shah2018-12-263-3/+23
|\ \ | | | | | | ice40: Improve handling of unconstrained IO
| * | ice40: Improve handling of unconstrained IODavid Shah2018-12-263-3/+23
| |/ | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Merge pull request #195 from YosysHQ/fix_194David Shah2018-12-251-0/+9
|\ \ | |/ |/| ecp5: Check for incorrect use of TRELLIS_IO 'B' pin
| * ecp5: Check for incorrect use of TRELLIS_IO 'B' pinDavid Shah2018-12-251-0/+9
|/ | | | Signed-off-by: David Shah <dave@ds0.me>
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