aboutsummaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* Towards IdString as per-context facilityClifford Wolf2018-06-185-53/+107
* Fixed include of "design.h" in "route.h"Clifford Wolf2018-06-181-1/+1
* Move contents of design.h to nextpnr.hClifford Wolf2018-06-183-107/+59
* Merge branch 'refactor'Clifford Wolf2018-06-1840-615/+591
|\
| * Rename chip.h to arch.hClifford Wolf2018-06-185-3/+3
| * Updates from clangformatClifford Wolf2018-06-185-22/+12
| * Rename Design to Context, derive from Arch instead of instantiatingClifford Wolf2018-06-1831-322/+309
| * Rename Chip to Arch and ChipArgs to ArchArgsClifford Wolf2018-06-1814-159/+158
|/
* Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnrClifford Wolf2018-06-187-23/+52
|\
| * cmake: Set EXCLUDE_FROM_ALL on Python module and testsDavid Shah2018-06-181-2/+2
| * cmake: Reenable -O3 for release buildsDavid Shah2018-06-181-1/+2
| * Fix hash specialisation for BelType and warnings in place_sa.ccDavid Shah2018-06-182-13/+22
| * Enable -WallDavid Shah2018-06-181-1/+1
| * Improving code style and fixing dummyDavid Shah2018-06-185-15/+34
* | Improvements in routerClifford Wolf2018-06-182-28/+35
|/
* Improve router log outputClifford Wolf2018-06-171-1/+6
* Updates from clangformatClifford Wolf2018-06-172-9/+13
* Improve router log messagesClifford Wolf2018-06-171-3/+29
* Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into chipdbngClifford Wolf2018-06-172-6/+2
|\
| * Speed up placerDavid Shah2018-06-172-6/+2
* | Refactore ice40 chipdb to use a super-large C-string as output formatClifford Wolf2018-06-173-27/+85
* | Minor chipdb.py improvementClifford Wolf2018-06-171-2/+17
* | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into chipdbngClifford Wolf2018-06-177-58/+111
|\|
| * Minor performance tweaks and fixesDavid Shah2018-06-173-24/+30
| * ice40: Fixing negative clock bitstream generationDavid Shah2018-06-171-1/+8
| * place_sa: Adding seed optionDavid Shah2018-06-174-13/+23
| * place_sa: Add a rip-up feature when initial placement failsDavid Shah2018-06-173-29/+59
* | Updates from clangformatClifford Wolf2018-06-172-22/+25
* | Move top-level ChipInfoPOD into ice40 chipdb blobClifford Wolf2018-06-174-126/+139
* | Move PackageInfoPOD to ice40 chipdb blobClifford Wolf2018-06-173-10/+12
* | Move TileType array to ice40 chipdb blobClifford Wolf2018-06-172-7/+14
* | Move BitstreamInfoPOD to ice40 chipdb blobClifford Wolf2018-06-173-17/+23
* | Move IerenInfoPOD to ice40 chipdb blobClifford Wolf2018-06-171-12/+11
* | Move TileInfoPOD to chipdb blobClifford Wolf2018-06-172-8/+16
* | Move SwitchInfoPOD to chipdb blobClifford Wolf2018-06-172-15/+25
* | Move PipInfoPOD into ChipDB binary blobClifford Wolf2018-06-171-6/+28
* | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into chipdbngClifford Wolf2018-06-1722-84/+387
|\|
| * place_sa: Make placement independant of unordered_map orderingDavid Shah2018-06-171-4/+8
| * General reformattingDavid Shah2018-06-174-4/+3
| * frontend/json: Look up netnames properly instead of using numberDavid Shah2018-06-171-7/+43
| * ice40: Add symbol output to bitstream generationDavid Shah2018-06-171-6/+8
| * Updating copyrightsDavid Shah2018-06-1717-7/+21
| * Improving the placer outputDavid Shah2018-06-176-15/+42
| * place_sa: Ignore Bels locked by manual placement for SA swapsDavid Shah2018-06-171-2/+8
| * Add 'get or default' functionsDavid Shah2018-06-172-3/+67
| * place_sa: Run a validity check at the end of placementDavid Shah2018-06-171-0/+9
| * ice40: Fixing buildDavid Shah2018-06-172-2/+2
| * Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnrDavid Shah2018-06-162-1/+1
| |\
| | * Renamed place.h to place_sa.h in place_sa.ccZipCPU2018-06-161-1/+1
| | * Changed place.h place_sa.hZipCPU2018-06-161-0/+0
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-26 10:34:06 +0000