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* Set divisor instead of absolute valueArjen Roodselaar2022-12-202-5/+10
* Allow setting cell placement timeoutArjen Roodselaar2022-12-203-13/+16
* Add --no-placer-timeout flag to override timeout during refinementArjen Roodselaar2022-12-193-5/+12
* Increase timeoutArjen Roodselaar2022-12-191-2/+4
* Timeout when legal placement can't be found for cellArjen Roodselaar2022-12-171-3/+6
* Merge pull request #1064 from YosysHQ/gatecat/ecp5-main-fixmyrtle2022-12-171-5/+4
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| * ecp5: Only write bitstream if --textcfg passedgatecat2022-12-171-5/+4
* | Merge pull request #1061 from yrabbit/fix-clock-guimyrtle2022-12-141-1/+1
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| * | gowin: not crush on unknown clock tap's sourcesYRabbit2022-12-141-1/+1
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* | Merge pull request #1060 from yrabbit/pll-inputsmyrtle2022-12-092-13/+14
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| * gowin: BUGFIX: Correctly handle resetsYRabbit2022-12-092-13/+14
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* Merge pull request #1059 from YosysHQ/gatecat/validity-errorsmyrtle2022-12-0726-34/+59
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| * ice40: Add debugs to isBelLocationValid for SB_IOSean Anderson2022-12-071-4/+22
| * api: add explain_invalid option to isBelLocationValidgatecat2022-12-0726-30/+37
* | Merge pull request #1058 from YosysHQ/gatecat/bounds-refactormyrtle2022-12-0727-63/+57
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| * heap: Remove custom bounding-box typegatecat2022-12-071-6/+0
| * refactor: ArcBounds -> BoundingBoxgatecat2022-12-0726-57/+57
* | Merge pull request #1055 from yrabbit/pll-pinsmyrtle2022-12-065-16/+140
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| * gowin: change the way networks are handledYRabbit2022-12-061-7/+8
| * Merge branch 'master' into pll-pinsYRabbit2022-12-0413-17/+17
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| * | gowin: add PLL pins processingYRabbit2022-12-045-10/+133
* | | Merge pull request #1056 from YosysHQ/gatecat/generic-fix-constsmyrtle2022-12-061-0/+3
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| * | viaduct: Fix constant connectivitygatecat2022-12-061-0/+3
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* | Merge pull request #1054 from YosysHQ/gatecat/api-add-constmyrtle2022-12-0413-17/+17
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| * Unbreak CIgatecat2022-12-021-5/+5
| * api: Make NetInfo* of checkPipAvailForNet constgatecat2022-12-0212-12/+12
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* Merge pull request #1048 from yrabbit/chipdb-cfgmyrtle2022-12-023-5/+23
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| * gowin: update the apicula versionYRabbit2022-12-021-1/+1
| * Merge branch 'master' into chipdb-cfgYRabbit2022-12-021-2/+2
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* | Merge pull request #1053 from YosysHQ/gatecat/pbfixmyrtle2022-11-281-2/+2
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| * | ecp5: Fix Python bindings for pip iteratorsgatecat2022-11-281-2/+2
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| * gowin: add information about pin configurationsYRabbit2022-11-252-4/+22
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* Merge pull request #1045 from yrabbit/unused-portsmyrtle2022-11-202-0/+16
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| * gowin: mark the PLL ports that are not in useYRabbit2022-11-202-0/+16
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* Merge pull request #1042 from yrabbit/add-z1myrtle2022-11-121-1/+1
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| * gowin: add support for a more common chipYRabbit2022-11-121-1/+1
* | Merge pull request #1040 from yrabbit/pll-stage0myrtle2022-11-116-8/+210
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| * gowin: use ctx->idf() a bitYRabbit2022-11-112-41/+17
| * gowin: add initial PLL supportYRabbit2022-11-106-1/+227
* | Merge pull request #1041 from YosysHQ/gatecat/fix-copy-warningmyrtle2022-11-101-0/+1
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| * | Fix "implicit copy constructor for 'Property' is deprecated"gatecat2022-11-101-0/+1
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* / fabulous: Tweak delay estimategatecat2022-11-101-0/+1
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* Merge pull request #1037 from YosysHQ/fix_python_verMiodrag Milanović2022-10-241-1/+2
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| * Fix python version in CIMiodrag Milanovic2022-10-241-1/+2
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* Update CI scriptMiodrag Milanovic2022-10-241-6/+6
* run clangformatgatecat2022-10-172-7/+12
* Merge pull request #1034 from lushaylabs/support-windows-crlfmyrtle2022-10-171-4/+4
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| * support windows line endingsLushay Labs2022-10-091-4/+4
* | Merge pull request #1035 from tyler274/patch-1myrtle2022-10-171-1/+1
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| * Correct Not Equal operator implementation in ice40Tyler2022-10-171-1/+1
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