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fabulous: fix, but disable, IO configuration
gatecat
2022-09-16
1
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+3
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Merge pull request #1026 from YosysHQ/gatecat/ecp5-bitstream-refactor
myrtle
2022-09-16
1
-1347
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+1402
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ecp5: Split bitstream generation into more functions
gatecat
2022-09-15
1
-1347
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+1402
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Merge pull request #1023 from YosysHQ/gatecat/ice40up-bram-pol
myrtle
2022-09-16
1
-3
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+7
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ice40: Fix UltraPlus BRAM clock polarity
gatecat
2022-09-14
1
-3
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+7
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Merge pull request #1025 from YosysHQ/gatecat/nexus-dev-fixes
myrtle
2022-09-15
3
-1
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+42
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nexus: Add ES2 device names and --list-devices
gatecat
2022-09-15
3
-1
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+42
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Merge pull request #1015 from YosysHQ/gatecat/fabulous-viaduct
myrtle
2022-09-15
12
-1
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+1637
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fabulous: Add a viaduct uarch
gatecat
2022-09-09
12
-1
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+1637
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Merge pull request #1024 from YosysHQ/gatecat/pybind11-bump
myrtle
2022-09-15
214
-10025
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+21644
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3rdparty: Bump vendored pybind11 version for py3.11 support
gatecat
2022-09-14
214
-10025
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+21644
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Merge pull request #1018 from yrabbit/bf-0
myrtle
2022-08-25
1
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+2
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gowin: BUGFIX. Really memorize the chip
YRabbit
2022-08-25
1
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+2
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Merge pull request #1017 from YosysHQ/routerfix
myrtle
2022-08-22
2
-5
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+4
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add missing overrides
Miodrag Milanovic
2022-08-22
1
-3
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+3
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Fix parameter order
Miodrag Milanovic
2022-08-22
1
-2
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+1
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Merge pull request #1016 from atsampson/python3
myrtle
2022-08-21
7
-16
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+16
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Use CMake's Python3 rather than PythonInterp in subdirs
Adam Sampson
2022-08-21
7
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+16
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pybindings: Mark CellInfo::bel as readonly
gatecat
2022-08-18
1
-2
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+1
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Merge pull request #1014 from LAK132/master
myrtle
2022-08-18
1
-4
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+4
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Replace deprecated method of finding Python 3
LAK132
2022-08-17
1
-4
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+4
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Merge pull request #1013 from YosysHQ/gatecat/viaduct-args
myrtle
2022-08-15
1
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+14
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viaduct: Allow passing command line options to uarch with -o
gatecat
2022-08-15
1
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+14
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Merge pull request #1012 from YosysHQ/gatecat/refactor-id-in
myrtle
2022-08-11
24
-203
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+153
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refactor: Use IdString::in instead of || chains
gatecat
2022-08-10
24
-203
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+153
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Merge pull request #1011 from YosysHQ/gatecat/nexus-lram-tmg
myrtle
2022-08-10
3
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+30
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nexus: Add timing data for LRAM
gatecat
2022-08-10
3
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+30
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Merge pull request #1010 from YosysHQ/gatecat/idf
myrtle
2022-08-10
22
-153
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+152
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refactor: id(stringf(...)) to new idf(...) helper
gatecat
2022-08-10
22
-153
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+152
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Merge pull request #1008 from YosysHQ/gatecat/generic-addbelpin
myrtle
2022-08-04
3
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+12
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generic: addBelPin with direction as an arg
gatecat
2022-08-04
3
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+12
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Merge pull request #1004 from yrabbit/fix-muxes
myrtle
2022-07-21
7
-38
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+26
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Merge branch 'master' into fix-muxes
YRabbit
2022-07-20
1
-1
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+1
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Merge pull request #1005 from YosysHQ/gatecat/nexus-ram-fixes
myrtle
2022-07-19
1
-1
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+1
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nexus: Fix CSDECODE parsing
gatecat
2022-07-19
1
-1
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+1
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gowin: fix compilation
YRabbit
2022-07-19
1
-8
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+0
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gowin: Remove incomprehensible names of the muxes
YRabbit
2022-07-19
7
-34
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+30
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Merge pull request #998 from yrabbit/clock-wip
myrtle
2022-07-18
6
-1
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+479
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Merge branch 'master' into clock-wip
YRabbit
2022-07-10
16
-49
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+198
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Merge pull request #999 from YosysHQ/gatecat/pseudocell-api
myrtle
2022-07-08
16
-49
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+198
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netlist: Add PseudoCell API
gatecat
2022-07-08
16
-49
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+198
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gowin: Remove unnecessary functions
YRabbit
2022-07-05
2
-33
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+9
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Merge branch 'master' into clock-wip
YRabbit
2022-07-05
9
-106
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+211
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Merge pull request #995 from pepijndevos/shadowram
myrtle
2022-07-05
6
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+187
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use DFF RAM mode
Pepijn de Vos
2022-07-02
1
-1
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+4
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Merge branch 'master' into shadowram
Pepijn de Vos
2022-07-02
9
-25
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+324
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hook up CE maybe
Pepijn de Vos
2022-06-16
3
-0
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+4
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lutram actually PnRs
Pepijn de Vos
2022-06-06
5
-38
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+43
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WIP shadowram
Pepijn de Vos
2022-06-05
6
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+175
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Merge pull request #1001 from YosysHQ/gatecat/generic-shared-pyb
myrtle
2022-07-05
2
-105
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+18
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