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| * Handle H00 and V00Miodrag Milanovic2019-11-111-6/+49
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| * More pips and fix for V01Miodrag Milanovic2019-11-111-42/+170
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| * cleanupMiodrag Milanovic2019-11-111-174/+78
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| * proper h06 and v06Miodrag Milanovic2019-11-111-34/+39
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| * More pips addedMiodrag Milanovic2019-11-101-41/+200
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| * more pips, and valid mappingMiodrag Milanovic2019-11-102-10/+23
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| * Fixed V2, some more pipsMiodrag Milanovic2019-11-101-12/+43
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| * more pipsMiodrag Milanovic2019-11-101-2/+43
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| * Draw some pips, fixed H6 and V6Miodrag Milanovic2019-11-093-31/+58
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| * Show V02/V06/H02/H06Miodrag Milanovic2019-10-253-13/+105
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| * display horizontal wires, add some globals to listMiodrag Milanovic2019-10-234-1/+123
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| * Split graphics calls for wires into gfx.ccMiodrag Milanovic2019-10-203-268/+304
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| * type needs to be part of hash for GroupIdMiodrag Milanovic2019-10-201-1/+3
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| * muxes only together with slicesMiodrag Milanovic2019-10-201-9/+7
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| * Remove not used lineMiodrag Milanovic2019-10-201-2/+0
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| * Simplify layout of elementsMiodrag Milanovic2019-10-204-400/+254
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| * fix slice wireMiodrag Milanovic2019-10-201-20/+20
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| * bound signalsMiodrag Milanovic2019-10-201-0/+65
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| * more wires between switchboxesMiodrag Milanovic2019-10-204-2/+59
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| * Add more types of wiresMiodrag Milanovic2019-10-202-177/+221
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| * Less types neededMiodrag Milanovic2019-10-202-56/+24
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| * finixed slice wiresMiodrag Milanovic2019-10-201-0/+27
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| * wd wiresMiodrag Milanovic2019-10-202-1/+32
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| * Fix look of some wiresMiodrag Milanovic2019-10-201-6/+9
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| * Add output wiresMiodrag Milanovic2019-10-201-0/+35
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| * fix mux displayMiodrag Milanovic2019-10-201-2/+2
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| * set wire active flagMiodrag Milanovic2019-10-202-1/+3
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| * clk and lsr muxesMiodrag Milanovic2019-10-202-1/+93
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| * draw rest of slice wires and more from switchboxMiodrag Milanovic2019-10-202-7/+106
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| * OptimizeMiodrag Milanovic2019-10-202-18/+87
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| * Add other side of slice wiresMiodrag Milanovic2019-10-202-14/+118
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| * Display rest of slice input wiresMiodrag Milanovic2019-10-202-3/+69
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| * Add more zoomMiodrag Milanovic2019-10-201-1/+1
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| * Start adding visible wiresMiodrag Milanovic2019-10-205-10/+99
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| * Added type to wireMiodrag Milanovic2019-10-203-1/+87
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| * Draw swbox, smaller slices, proper ioMiodrag Milanovic2019-10-204-28/+157
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* Merge pull request #342 from xobs/msvc-static-fixDavid Shah2019-10-181-1/+1
|\ | | | | cmake: don't link libutil on windows
| * cmake: don't link libutil on windowsSean Cross2019-10-181-1/+1
|/ | | | | | libutil is only required to be linked on Linux. Signed-off-by: Sean Cross <sean@xobs.io>
* Merge pull request #341 from YosysHQ/dave/ice40-pcf-frequencyDavid Shah2019-10-132-0/+21
|\ | | | | ice40: Add set_frequency pcf command; and document pcf format
| * ice40: Add set_frequency pcf command; and document pcfDavid Shah2019-10-132-0/+21
|/ | | | Signed-off-by: David Shah <dave@ds0.me>
* Merge pull request #340 from YosysHQ/dave/ecp5_ioDavid Shah2019-10-135-9/+217
|\ | | | | ecp5: IOLOGIC improvements
| * ecp5: Add support for ECLKBRIDGECSDavid Shah2019-10-111-1/+52
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * ecp5: Fix tristate IO registersDavid Shah2019-10-091-3/+9
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * ecp5: Add support for IO registersDavid Shah2019-10-093-1/+113
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * ecp5: Add IDDR71B supportDavid Shah2019-10-092-3/+16
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * ecp5: Add ODDR71B supportDavid Shah2019-10-091-3/+14
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * ecp5: Preparations for new IO belsDavid Shah2019-10-093-1/+16
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Merge pull request #338 from YosysHQ/docsDavid Shah2019-10-112-0/+140
|\ \ | | | | | | Documentation Improvements
| * | docs: Improvements to coding notesDavid Shah2019-10-031-0/+30
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | docs: Working on coding tipsDavid Shah2019-09-291-0/+37
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
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