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* ecp5: Allow setting drive strength for LVCMOS33D IOsMike Walters2020-05-121-0/+19
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* ecp5: Fix CSDECODE bitgenDavid Shah2020-04-151-0/+3
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Fix routing bitgen for non-SERDES 'VCIB' tilesDavid Shah2020-04-101-3/+12
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Make hysteresis default-on for LVCMOS33 bidir as well as inputDavid Shah2020-04-091-9/+7
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Handle OPENDRAIN attribute.Gary Wong2020-04-031-0/+3
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* Enum/int compatibility for EHXPLLL parametersMartin2020-04-021-2/+7
| | | | | | - Lattice component EHXPLLL parameter compatibility, allowing to pass an int parameter for the enum (as expected by trellis tile) e.g. CLKOP_TRIM_DELAY : integer := 0;
* ecp5: Proper support for '12k' deviceDavid Shah2020-03-131-4/+8
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Fix differential inputsDavid Shah2020-03-081-1/+6
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add SPICB0 IO supportDavid Shah2020-01-201-2/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add support for top pseudo diff outputsDavid Shah2020-01-151-12/+35
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add support for flipflops with preloadDavid Shah2019-12-071-0/+4
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Fix 25k DDRDLLA bitstream genDavid Shah2019-11-291-2/+3
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Fix dynamic DELAYF controlDavid Shah2019-11-181-0/+3
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Allow setting drive strength for 3V3 IOsDavid Shah2019-10-261-0/+10
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add support for IO registersDavid Shah2019-10-091-0/+6
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Preparations for new IO belsDavid Shah2019-10-091-0/+7
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Adding support for 36-bit wide PDP RAMsDavid Shah2019-10-011-15/+22
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add support for clock gating with DCCADavid Shah2019-08-311-1/+29
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add full part name to bitstream headerDavid Shah2019-08-271-0/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add GSR/SGSR supportDavid Shah2019-08-271-1/+1
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add --out-of-context for building hard macrosDavid Shah2019-08-071-6/+4
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: New Property interfaceDavid Shah2019-08-051-56/+75
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Improve error message for bad chars in BRAM init stringsDavid Shah2019-06-081-7/+12
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Derived constraint support for PLLs, clock dividers and oscillatorsDavid Shah2019-02-241-3/+4
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ecp5: Fixes for litedramDavid Shah2019-02-241-8/+12
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ecp5: Add DIFFRESISTOR supportDavid Shah2019-02-241-0/+2
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ecp5: Add support for referenced inputsDavid Shah2019-02-241-5/+58
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ecp5: Add DELAYF/DELAYG supportDavid Shah2019-02-241-12/+16
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ecp5: Add TERMINATION supportDavid Shah2019-02-241-0/+16
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add DDRDLLA supportDavid Shah2019-02-241-0/+12
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add ECLKSYNCB supportDavid Shah2019-02-241-0/+7
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Helper functions and bitstream for DQSDavid Shah2019-02-241-0/+30
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Packing of ODDRX2FDavid Shah2019-02-241-0/+1
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Fix typoDavid Shah2019-02-141-0/+1
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Embed baseconfigDavid Shah2019-02-081-2/+42
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Adding DTR, OSCG, CLKDIVF, USRMCLK, JTAGGDavid Shah2019-02-081-0/+29
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add PULLMODE supportDavid Shah2019-01-071-0/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add IOLOGIC timing and bitstream; ODDR workingDavid Shah2018-12-141-0/+18
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Fix UR PLL tile coordinatesDavid Shah2018-11-261-2/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* clangformatDavid Shah2018-11-161-2/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Merge pull request #119 from cr1901/win-fixDavid Shah2018-11-161-1/+1
|\ | | | | nextpnr-ecp5 Windows Fixes
| * Rename io.{h,cc} to pio.{h,cc} to avoid naming conflict with ↵William D. Jones2018-11-031-1/+1
| | | | | | | | | | | | Windows-provided io.h. Signed-off-by: William D. Jones <thor0505@comcast.net>
* | ecp5: Better use of BoostDavid Shah2018-11-161-3/+3
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | ecp5: Regression fix & formatDavid Shah2018-11-151-1/+2
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | ecp5: clangformatDavid Shah2018-11-151-5/+9
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | ecp5: Adding ancillary DCU belsDavid Shah2018-11-151-0/+17
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | ecp5: remove debug and clangformatDavid Shah2018-11-151-4/+5
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | dcu: Fix bitstream param handlingDavid Shah2018-11-151-0/+1
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | ecp5: Working on DCUDavid Shah2018-11-151-5/+39
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | ecp5: DCU bitstream gen handlingDavid Shah2018-11-151-0/+45
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
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