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fpga_interchange
/
arch.h
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Age
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*
Add RelSlice::ssize and use it when comparing with signed ints.
Keith Rothman
2021-02-05
1
-13
/
+14
*
Move all string data into BBA file.
Keith Rothman
2021-02-05
1
-6
/
+7
*
Use RelSlice instead of RelPtr in cases where sizes are present.
Keith Rothman
2021-02-04
1
-80
/
+50
*
Update APIs to conform to style guide.
Keith Rothman
2021-02-04
1
-52
/
+55
*
Remove unused method getReservedWireNet.
Keith Rothman
2021-02-04
1
-7
/
+0
*
Update copywrite headers.
Keith Rothman
2021-02-04
1
-1
/
+2
*
Run "make clangformat".
Keith Rothman
2021-02-04
1
-104
/
+73
*
Update FPGA interchange to use IdStringList.
Keith Rothman
2021-02-04
1
-32
/
+25
*
Start adding data for placement constraint solving.
Keith Rothman
2021-02-04
1
-5
/
+22
*
Debug BEL bucket data.
Keith Rothman
2021-02-04
1
-11
/
+14
*
Add initial updates to FPGA interchange arch for BEL buckets.
Keith Rothman
2021-02-04
1
-0
/
+204
*
Address review comments.
Keith Rothman
2021-02-04
1
-0
/
+1
*
Fix BBA import bugs.
Keith Rothman
2021-02-04
1
-21
/
+46
*
Assorted fixes to new FPGA interchange based arch.
Keith Rothman
2021-02-04
1
-1
/
+1
*
Initial compiling version.
Keith Rothman
2021-02-04
1
-16
/
+16
*
Initial FPGA interchange (which is just a cut-down xilinx arch).
Keith Rothman
2021-02-04
1
-0
/
+1096
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