iCE40/nextpnr - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	interchange: Reserve site ports only reachable from dedicated routing	gatecat	2021-07-01	1	-0/+3
\| \| \| \|	Signed-off-by: gatecat <gatecat@ds0.me>
*	Using hashlib in arches	gatecat	2021-06-02	1	-37/+9
\| \| \| \|	Signed-off-by: gatecat <gatecat@ds0.me>
*	[interchange] Fix invalid use of local variables due to refactoring.	Keith Rothman	2021-04-06	1	-0/+3
\| \| \| \|	Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
*	Add initial handling of local site inverters and constant signals.	Keith Rothman	2021-03-25	1	-0/+6
\| \| \| \|	Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
*	Initial version of inverter logic.	Keith Rothman	2021-03-23	1	-0/+7
\| \| \| \| \| \| \|	For now just implements some inspection capabilities, and the site router (for now) avoids inverted paths. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
*	Rework FPGA interchange site router.	Keith Rothman	2021-03-22	1	-0/+819
	The new site router should be robust to most situations, and isn't significantly slower with the use of caching. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>