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Some models have I/O cells that are IOBUFs, and other types (IBUFs and
OBUFs) are obtained by feeding 1 or 0 to the OEN input. This is done
with general-purpose routing so it's best to do it here to avoid
conflicts.
For this purpose, in the new bases, these special cells are of type IOBS
(IOB Simplified).
The proposed changes are compatible with bases of previous versions of
Apycula and do not require changing .CST constraint files.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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* A hardwired MUX within each logical cell is used.
* The delay is equal 0.
* No user placement constraints.
* The output route contains dummy PIPs. They are ignored by gowin_pack, but it may be worth removing them.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: David Shah <dave@ds0.me>
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* load wires
* add slice bels
* add IOB
* add aliases
* local aliases
* broken packing stuff
* working packer
* add constraints
* pnr runs1111
* add timing info
* constraints
* more constraint stuff
* add copyright
* remove generic reference
* remove parameters
* remove generic python api
* add newline to end of file
* some small refactoring
* warn on invalid constraints
* don't error on missing cell
* comment out debugging print
* typo
* avoid copy
* faster empty idstring
* remove intermediate variable
* no more deadnames
* fix cst warnings
* increase ripup and epsilon a bit
* take single device parameter
* add info to readme
* gui stubs
* Revert 4d03b681a8634e978bd5af73c97665500047e055
* assign ff_used in assignArchInfo
* decrease beta for better routability
* try to fix CI
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