iCE40/nextpnr - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	gowin: Add simplified IO cells processing	YRabbit	2021-12-20	1	-2/+21
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Some models have I/O cells that are IOBUFs, and other types (IBUFs and OBUFs) are obtained by feeding 1 or 0 to the OEN input. This is done with general-purpose routing so it's best to do it here to avoid conflicts. For this purpose, in the new bases, these special cells are of type IOBS (IOB Simplified). The proposed changes are compatible with bases of previous versions of Apycula and do not require changing .CST constraint files. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
*	clangformat	gatecat	2021-12-12	1	-3/+3
\| \| \| \|	Signed-off-by: gatecat <gatecat@ds0.me>
*	gowin: BUGFIX. Place the ALU head in sliсe 0 only	YRabbit	2021-12-11	1	-0/+3
\| \| \| \|	Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
*	gowin: Explicitly initialize the y in the cluster	YRabbit	2021-10-22	1	-0/+5
\| \| \| \|	Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
*	gowin: Add ALU support.	YRabbit	2021-10-22	1	-6/+211
\| \| \| \| \| \| \| \|	- Both the mode used by yosys and all Gowin primitive modes are supported. - The ALU always starts with a zero slice. - The maximum length of the ALU chain is limited to one line of the chip. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
*	gowin: add support for wide LUTs.	YRabbit	2021-10-07	1	-0/+261
\| \| \| \| \| \| \| \| \|	* A hardwired MUX within each logical cell is used. * The delay is equal 0. * No user placement constraints. * The output route contains dummy PIPs. They are ignored by gowin_pack, but it may be worth removing them. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
*	gowin: Add constraints on primitive placement.	YRabbit	2021-08-31	1	-3/+13
\| \| \| \| \| \| \| \| \| \|	Added support for the INS_LOC instruction in the constraints file (.CST), which is used to specify object placement. Expanded treatment of IO_LOC/IO_PORT constraints, which now can be applied to both ports and IO buffers. Port constraints have priority. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
*	gowin: Change the constraint parser to support multiple options per line. ↵	YRabbit	2021-08-06	1	-1/+3
\| \| \| \| \| \|	Add support for IOBUF and TBUF I/O modes. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
*	Fixing old emails and names in copyrights	gatecat	2021-06-12	1	-1/+1
\| \| \| \|	Signed-off-by: gatecat <gatecat@ds0.me>
*	Using hashlib in arches	gatecat	2021-06-02	1	-5/+4
\| \| \| \|	Signed-off-by: gatecat <gatecat@ds0.me>
*	Use hashlib for core netlist structures	gatecat	2021-06-02	1	-11/+14
\| \| \| \|	Signed-off-by: gatecat <gatecat@ds0.me>
*	clangformat	David Shah	2020-12-30	1	-13/+9
\| \| \| \|	Signed-off-by: David Shah <dave@ds0.me>
*	Gowin target (#542)	Pepijn de Vos	2020-12-30	1	-0/+291
	* load wires * add slice bels * add IOB * add aliases * local aliases * broken packing stuff * working packer * add constraints * pnr runs1111 * add timing info * constraints * more constraint stuff * add copyright * remove generic reference * remove parameters * remove generic python api * add newline to end of file * some small refactoring * warn on invalid constraints * don't error on missing cell * comment out debugging print * typo * avoid copy * faster empty idstring * remove intermediate variable * no more deadnames * fix cst warnings * increase ripup and epsilon a bit * take single device parameter * add info to readme * gui stubs * Revert 4d03b681a8634e978bd5af73c97665500047e055 * assign ff_used in assignArchInfo * decrease beta for better routability * try to fix CI