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* Set the default log to stdoutZipCPU2018-06-071-1/+12
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| * Initial (random) placer capabilityZipCPU2018-06-071-1/+12
| | | | | | | | | | | | | | | | | | | | This commit also includes changes to jsonparse to allow it to 1) recognize ports with no connection, and set their net pointers to NULL 2) recognize designs with a ports node rather than a ports_direction The rule checker has also been modified to accommodate possible NULL netlists The ice40 chip now also has iterator operations ++bi and bi++.
* | ice40: Refactor PortPin and add Python bindingDavid Shah2018-06-071-107/+4
|/ | | | Signed-off-by: David Shah <davey1576@gmail.com>
* clang-format for design and chip codebaseClifford Wolf2018-06-071-439/+440
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add ice40 geometry informationClifford Wolf2018-06-061-1/+6
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add ice40 --test modeClifford Wolf2018-06-061-0/+9
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Refactor Chip API and iCE40 databaseClifford Wolf2018-06-061-119/+231
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add iCE40 blockram belsClifford Wolf2018-06-041-0/+84
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Replace GuiLine with GraphicElementClifford Wolf2018-06-041-7/+4
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add iCE40 SB_IO belsClifford Wolf2018-06-031-2/+15
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add ice40 ICESTORM_LC belsClifford Wolf2018-06-021-3/+22
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Use singular in type names (BelRange, WireIterator)Clifford Wolf2018-06-021-18/+18
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add DelayInfo structClifford Wolf2018-05-291-2/+10
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Progress in chip.h APIClifford Wolf2018-05-261-28/+110
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Progress in ice40 chipdbClifford Wolf2018-05-261-48/+115
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Start work on iCE40 chipdbClifford Wolf2018-05-261-0/+224
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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