index
:
iCE40/nextpnr
master
[no description]
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
mistral
Commit message (
Expand
)
Author
Age
Files
Lines
...
*
mistral: Add MISTRAL_CLKBUF cell type
gatecat
2021-05-15
5
-1
/
+15
*
mistral: Tidying up
gatecat
2021-05-15
10
-10
/
+10
*
mistral: Make router2 the default
gatecat
2021-05-15
1
-1
/
+1
*
mistral: Speed up bel binding and checking
gatecat
2021-05-15
1
-4
/
+18
*
mistral: Workaround for weird SCLR issue
gatecat
2021-05-15
1
-0
/
+7
*
mistral: Fix ENA and ACLR bitstream generation
gatecat
2021-05-15
4
-4
/
+11
*
mistral: Disable global buffers that are currently broken
gatecat
2021-05-15
1
-0
/
+2
*
mistral: Compensate for EF_SEL mirroring in validity check
gatecat
2021-05-15
1
-2
/
+2
*
mistral: Fix EF_SEL and BTO_DIS
gatecat
2021-05-15
2
-4
/
+5
*
mistral: PKREG bits appear to be mirrored within a half?
gatecat
2021-05-15
1
-2
/
+3
*
mistral: Debugging flipflops
gatecat
2021-05-15
1
-3
/
+4
*
mistral: Trim SDATA if SLOAD is low
gatecat
2021-05-15
1
-0
/
+9
*
mistral: FF&CLKBUF fixes, part 1
gatecat
2021-05-15
2
-1
/
+10
*
mistral: First pass at FF and CLKBUF bitgen
gatecat
2021-05-15
2
-18
/
+115
*
mistral: Account for TD input count limit
gatecat
2021-05-15
4
-9
/
+128
*
msitral: Fix pip iterator Python bindings
gatecat
2021-05-15
1
-2
/
+2
*
mistral: Implement PIP locations, too
gatecat
2021-05-15
1
-1
/
+1
*
mistral: Implement bounding boxes for router2
gatecat
2021-05-15
2
-1
/
+15
*
mistral: Debugging carry chain issues
gatecat
2021-05-15
2
-13
/
+34
*
mistral: Adding FF control set reservation
gatecat
2021-05-15
3
-58
/
+148
*
mistral: Carry fixes
gatecat
2021-05-15
2
-3
/
+16
*
mistral: Carry debugging
gatecat
2021-05-15
3
-41
/
+11
*
mistral: Write arith mode to bitstream (not yet functional)
gatecat
2021-05-15
2
-2
/
+18
*
mistral: First pass at carry packing
gatecat
2021-05-15
4
-8
/
+82
*
mistral: FF validity checking fixes
gatecat
2021-05-15
1
-7
/
+13
*
mistral: Fix constant trimming
gatecat
2021-05-15
2
-1
/
+2
*
mistral: Write LUT inits
gatecat
2021-05-15
2
-1
/
+72
*
mistral: Add some IO configuration
gatecat
2021-05-15
1
-0
/
+30
*
mistral: Setting some more boilerplate bits
gatecat
2021-05-15
3
-1
/
+118
*
mistral: Add stub RBF generation
gatecat
2021-05-15
4
-9
/
+108
*
mistral: Rename clock buffer primitive
gatecat
2021-05-15
2
-2
/
+3
*
mistral: Python and GUI stub
gatecat
2021-05-15
2
-0
/
+212
*
mistral: Implement some misc. things
gatecat
2021-05-15
4
-10
/
+78
*
mistral: Some preps for generating bitstreams
gatecat
2021-05-15
4
-28
/
+131
*
mistral: Adding a function for computing ALM LUT masks
gatecat
2021-05-15
2
-0
/
+90
*
mistral: Add IO packing
gatecat
2021-05-15
5
-8
/
+135
*
mistral: Add a basic QSF parser
gatecat
2021-05-15
4
-1
/
+295
*
mistral: Add some packing logic based on nexus
gatecat
2021-05-15
4
-3
/
+202
*
mistral: Working on FF validity checking
gatecat
2021-05-15
2
-1
/
+117
*
mistral: Add the 'pin style' stuff based on Nexus
gatecat
2021-05-15
2
-0
/
+112
*
mistral: Working on ALM input assignment
gatecat
2021-05-15
2
-2
/
+118
*
mistral: Add stub pack/place/route functions
gatecat
2021-05-15
4
-4
/
+142
*
mistral: Renamed arch from cyclonev
gatecat
2021-05-15
8
-0
/
+1586
[prev]