From 009d3b64b67cf8a1ac2929eea906ae4fc4c23ef6 Mon Sep 17 00:00:00 2001 From: Keith Rothman <537074+litghost@users.noreply.github.com> Date: Thu, 1 Apr 2021 15:16:23 -0700 Subject: [interchange] Update to v6 of FPGA interchange chipdb. Changes: - Adds LUT output pin to LutBelPOD. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> --- fpga_interchange/arch.cc | 7 ++++++- fpga_interchange/chipdb.h | 3 ++- fpga_interchange/luts.h | 4 ++++ 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/fpga_interchange/arch.cc b/fpga_interchange/arch.cc index 2e1c452a..0d6cc4de 100644 --- a/fpga_interchange/arch.cc +++ b/fpga_interchange/arch.cc @@ -247,10 +247,13 @@ Arch::Arch(ArchArgs args) : args(args) LutElement &element = elements.back(); element.width = lut_element.width; for (auto &lut_bel : lut_element.lut_bels) { - auto result = element.lut_bels.emplace(IdString(lut_bel.name), LutBel()); + IdString name(lut_bel.name); + auto result = element.lut_bels.emplace(name, LutBel()); NPNR_ASSERT(result.second); LutBel &lut = result.first->second; + lut.name = name; + lut.low_bit = lut_bel.low_bit; lut.high_bit = lut_bel.high_bit; @@ -260,6 +263,8 @@ Arch::Arch(ArchArgs args) : args(args) lut.pins.push_back(pin); lut.pin_to_index[pin] = i; } + + lut.output_pin = IdString(lut_bel.out_pin); } element.compute_pin_order(); diff --git a/fpga_interchange/chipdb.h b/fpga_interchange/chipdb.h index d78e3b61..6c7b8c83 100644 --- a/fpga_interchange/chipdb.h +++ b/fpga_interchange/chipdb.h @@ -34,7 +34,7 @@ NEXTPNR_NAMESPACE_BEGIN * kExpectedChipInfoVersion */ -static constexpr int32_t kExpectedChipInfoVersion = 5; +static constexpr int32_t kExpectedChipInfoVersion = 6; // Flattened site indexing. // @@ -133,6 +133,7 @@ NPNR_PACKED_STRUCT(struct LutBelPOD { RelSlice pins; // constid uint32_t low_bit; uint32_t high_bit; + int32_t out_pin; // constid }); NPNR_PACKED_STRUCT(struct LutElementPOD { diff --git a/fpga_interchange/luts.h b/fpga_interchange/luts.h index dec5a9d6..5a46b3ed 100644 --- a/fpga_interchange/luts.h +++ b/fpga_interchange/luts.h @@ -51,10 +51,14 @@ struct LutCell struct LutBel { + IdString name; + // LUT BEL pins to LUT array index. std::vector pins; std::unordered_map pin_to_index; + IdString output_pin; + // What part of the LUT equation does this LUT output use? // This assumes contiguous LUT bits. uint32_t low_bit; -- cgit v1.2.3