From 8a94a3451f88ca6632991ef3f2a61e4ed9a4ac5b Mon Sep 17 00:00:00 2001
From: "William D. Jones" <thor0505@comcast.net>
Date: Mon, 7 Dec 2020 02:15:29 -0500
Subject: machxo2: Stub valid BEL functions with comment. Place phase
 segfaults.

---
 machxo2/arch.cc | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/machxo2/arch.cc b/machxo2/arch.cc
index 42d93f16..d9753528 100644
--- a/machxo2/arch.cc
+++ b/machxo2/arch.cc
@@ -382,12 +382,17 @@ TimingClockingInfo Arch::getPortClockingInfo(const CellInfo *cell, IdString port
 
 bool Arch::isValidBelForCell(CellInfo *cell, BelId bel) const
 {
-    return false;
+    // FIXME: Unlike ECP5, SLICEs in a given tile do not share a clock, so
+    // any SLICE Cell is valid for any BEL, even if some cells are already
+    // bound to BELs in the tile. However, this may need to be filled in once
+    // more than one LUT4 and DFF type is supported.
+    return true;
 }
 
 bool Arch::isBelLocationValid(BelId bel) const
 {
-    return false;
+    // FIXME: Same deal as isValidBelForCell.
+    return true;
 }
 
 #ifdef WITH_HEAP
-- 
cgit v1.2.3