From c27c96f4f0ec66d13bea7d7cdea25fbeb2e189b7 Mon Sep 17 00:00:00 2001 From: David Shah Date: Wed, 20 Jun 2018 20:12:23 +0200 Subject: place_sa: Improvements including supporting force and ordering consistency Signed-off-by: David Shah --- common/place_sa.cc | 24 ++++++++++++++++-------- ice40/pack.cc | 4 ++-- ice40/picorv32_arachne.sh | 4 ++-- 3 files changed, 20 insertions(+), 12 deletions(-) diff --git a/common/place_sa.cc b/common/place_sa.cc index 2b8b960b..7325c557 100644 --- a/common/place_sa.cc +++ b/common/place_sa.cc @@ -145,7 +145,7 @@ class SAPlacer curr_wirelength = 0; for (auto net : ctx->nets) { float wl = get_wirelength(net.second); - wirelengths[net.second] = wl; + wirelengths[net.first] = wl; curr_wirelength += wl; } @@ -221,9 +221,17 @@ class SAPlacer std::string cell_text = "no cell"; if (cell != IdString()) cell_text = std::string("cell '") + cell.str(ctx) + "'"; - log_error("post-placement validity check failed for Bel '%s' " - "(%s)", - ctx->getBelName(bel).c_str(ctx), cell_text.c_str()); + if (ctx->force) { + log_warning( + "post-placement validity check failed for Bel '%s' " + "(%s)\n", + ctx->getBelName(bel).c_str(ctx), cell_text.c_str()); + } else { + log_error( + "post-placement validity check failed for Bel '%s' " + "(%s)\n", + ctx->getBelName(bel).c_str(ctx), cell_text.c_str()); + } } } return true; @@ -328,7 +336,7 @@ class SAPlacer bool try_swap_position(CellInfo *cell, BelId newBel) { static std::unordered_set update; - static std::vector> new_lengths; + static std::vector> new_lengths; new_lengths.clear(); update.clear(); BelId oldBel = cell->bel; @@ -373,10 +381,10 @@ class SAPlacer // Recalculate wirelengths for all nets touched by the peturbation for (auto net : update) { - new_wirelength -= wirelengths.at(net); + new_wirelength -= wirelengths.at(net->name); float net_new_wl = get_wirelength(net); new_wirelength += net_new_wl; - new_lengths.push_back(std::make_pair(net, net_new_wl)); + new_lengths.push_back(std::make_pair(net->name, net_new_wl)); } delta = new_wirelength - curr_wirelength; n_move++; @@ -434,7 +442,7 @@ class SAPlacer } Context *ctx; - std::unordered_map wirelengths; + std::unordered_map wirelengths; float curr_wirelength = std::numeric_limits::infinity(); float temp = 1000; bool improved = false; diff --git a/ice40/pack.cc b/ice40/pack.cc index 19f1e7bc..853f510e 100644 --- a/ice40/pack.cc +++ b/ice40/pack.cc @@ -244,8 +244,8 @@ static void set_net_constant(const Context *ctx, NetInfo *orig, CellInfo *uc = user.cell; log_info("%s user %s\n", orig->name.c_str(ctx), uc->name.c_str(ctx)); - if (is_lut(ctx, uc) && (user.port.str(ctx).at(0) == 'I') && - !constval) { + if ((is_lut(ctx, uc) || is_lc(ctx, uc)) && + (user.port.str(ctx).at(0) == 'I') && !constval) { uc->ports[user.port].net = nullptr; } else { uc->ports[user.port].net = constnet; diff --git a/ice40/picorv32_arachne.sh b/ice40/picorv32_arachne.sh index 00cfe6a4..b3960fdc 100755 --- a/ice40/picorv32_arachne.sh +++ b/ice40/picorv32_arachne.sh @@ -3,7 +3,7 @@ set -ex rm -f picorv32.v wget https://raw.githubusercontent.com/cliffordwolf/picorv32/master/picorv32.v yosys -p 'synth_ice40 -nocarry -blif picorv32.blif -top top' picorv32.v picorv32_top.v -arachne-pnr -d 8k --post-place-blif picorv32_place.blif picorv32.blif +arachne-pnr -d 8k --post-place-blif picorv32_place.blif picorv32.blif -o picorv32_arachne_all.asc yosys -p "read_blif -wideports picorv32_place.blif; read_verilog -lib +/ice40/cells_sim.v; write_json picorv32_place.json" ./transform_arachne_loc.py picorv32_place.json > picorv32_place_nx.json -../nextpnr-ice40 --hx8k --asc picorv32.asc --json picorv32_place_nx.json +../nextpnr-ice40 --hx8k --asc picorv32_ar_placed.asc --json picorv32_place_nx.json --force -- cgit v1.2.3