From dcb09ec8deddb1c90c53acc157baf941fb875142 Mon Sep 17 00:00:00 2001
From: gatecat <gatecat@ds0.me>
Date: Fri, 30 Apr 2021 11:07:31 +0100
Subject: interchange: Implement getWireType

Signed-off-by: gatecat <gatecat@ds0.me>
---
 3rdparty/fpga-interchange-schema |  2 +-
 common/arch_pybindings_shared.h  |  2 ++
 fpga_interchange/arch.cc         | 19 ++++++++++++++++++-
 3 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/3rdparty/fpga-interchange-schema b/3rdparty/fpga-interchange-schema
index 5208d794..b3ab0977 160000
--- a/3rdparty/fpga-interchange-schema
+++ b/3rdparty/fpga-interchange-schema
@@ -1 +1 @@
-Subproject commit 5208d794d318e9151b93120d7e5ba75d8aef45e7
+Subproject commit b3ab09776c8dc31a71ca2c7fbcb4575219232d16
diff --git a/common/arch_pybindings_shared.h b/common/arch_pybindings_shared.h
index 69d7025f..c2fe3e24 100644
--- a/common/arch_pybindings_shared.h
+++ b/common/arch_pybindings_shared.h
@@ -67,6 +67,8 @@ fn_wrapper_1a<Context, decltype(&Context::getWireBelPins), &Context::getWireBelP
 
 fn_wrapper_1a<Context, decltype(&Context::getWireChecksum), &Context::getWireChecksum, pass_through<uint32_t>,
               conv_from_str<WireId>>::def_wrap(ctx_cls, "getWireChecksum");
+fn_wrapper_1a<Context, decltype(&Context::getWireType), &Context::getWireType, conv_to_str<IdString>,
+              conv_from_str<WireId>>::def_wrap(ctx_cls, "getWireType");
 fn_wrapper_3a_v<Context, decltype(&Context::bindWire), &Context::bindWire, conv_from_str<WireId>,
                 addr_and_unwrap<NetInfo>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindWire");
 fn_wrapper_1a_v<Context, decltype(&Context::unbindWire), &Context::unbindWire, conv_from_str<WireId>>::def_wrap(
diff --git a/fpga_interchange/arch.cc b/fpga_interchange/arch.cc
index 441c2e1f..c49a172b 100644
--- a/fpga_interchange/arch.cc
+++ b/fpga_interchange/arch.cc
@@ -461,7 +461,24 @@ WireId Arch::getWireByName(IdStringList name) const
     return ret;
 }
 
-IdString Arch::getWireType(WireId wire) const { return id(""); }
+IdString Arch::getWireType(WireId wire) const
+{
+    int tile = wire.tile, index = wire.index;
+    if (tile == -1) {
+        // Nodal wire
+        const TileWireRefPOD &wr = chip_info->nodes[wire.index].tile_wires[0];
+        tile = wr.tile;
+        index = wr.index;
+    }
+    auto &w2t = chip_info->tiles[tile].tile_wire_to_type;
+    if (index >= w2t.ssize())
+        return IdString();
+    int wire_type = w2t[index];
+    if (wire_type == -1)
+        return IdString();
+    return IdString(chip_info->wire_types[wire_type].name);
+}
+
 std::vector<std::pair<IdString, std::string>> Arch::getWireAttrs(WireId wire) const { return {}; }
 
 // -----------------------------------------------------------------------
-- 
cgit v1.2.3