From ea03aafc26f8d7c6cde75b9054a508470f91965b Mon Sep 17 00:00:00 2001 From: David Shah Date: Sun, 30 Sep 2018 15:13:18 +0100 Subject: clangformat Signed-off-by: David Shah --- common/log.cc | 9 ++++++--- common/place_common.cc | 3 ++- common/placer1.cc | 14 +++++++++----- common/settings.h | 4 ++-- generic/arch.cc | 15 +++------------ gui/designwidget.cc | 17 +++++++---------- gui/designwidget.h | 5 +++-- ice40/arch.cc | 1 - ice40/arch.h | 2 +- ice40/arch_place.cc | 4 ++-- ice40/bitstream.cc | 5 +---- ice40/chains.cc | 3 ++- ice40/delay.cc | 2 +- ice40/gfx.cc | 7 ++++--- ice40/pack.cc | 38 +++++++++++++++++++++++--------------- 15 files changed, 66 insertions(+), 63 deletions(-) diff --git a/common/log.cc b/common/log.cc index 3ae553e9..6b2d6065 100644 --- a/common/log.cc +++ b/common/log.cc @@ -177,7 +177,8 @@ void log_always(const char *format, ...) void log(const char *format, ...) { - if (log_quiet_warnings) return; + if (log_quiet_warnings) + return; va_list ap; va_start(ap, format); logv(format, ap); @@ -186,7 +187,8 @@ void log(const char *format, ...) void log_info(const char *format, ...) { - if (log_quiet_warnings) return; + if (log_quiet_warnings) + return; va_list ap; va_start(ap, format); logv_info(format, ap); @@ -233,7 +235,8 @@ void log_cmd_error(const char *format, ...) void log_break() { - if (log_quiet_warnings) return; + if (log_quiet_warnings) + return; if (log_newline_count < 2) log_always("\n"); if (log_newline_count < 2) diff --git a/common/place_common.cc b/common/place_common.cc index 5cdb96ef..120e5e00 100644 --- a/common/place_common.cc +++ b/common/place_common.cc @@ -329,7 +329,8 @@ class ConstraintLegaliseWorker yRootSearch = IncreasingDiameterSearch(cell->constr_y); if (cell->constr_z == cell->UNCONSTR) - zRootSearch = IncreasingDiameterSearch(currentLoc.z, 0, ctx->getTileBelDimZ(currentLoc.x, currentLoc.y)); + zRootSearch = + IncreasingDiameterSearch(currentLoc.z, 0, ctx->getTileBelDimZ(currentLoc.x, currentLoc.y)); else zRootSearch = IncreasingDiameterSearch(cell->constr_z); while (!xRootSearch.done()) { diff --git a/common/placer1.cc b/common/placer1.cc index 363b4d58..01f822a5 100644 --- a/common/placer1.cc +++ b/common/placer1.cc @@ -81,7 +81,8 @@ class SAPlacer } } - ~SAPlacer() { + ~SAPlacer() + { for (auto &net : ctx->nets) net.second->udata = old_udata[net.second->udata]; } @@ -351,7 +352,7 @@ class SAPlacer // Attempt a SA position swap, return true on success or false on failure bool try_swap_position(CellInfo *cell, BelId newBel) { - static std::vector updates; + static std::vector updates; updates.clear(); BelId oldBel = cell->bel; CellInfo *other_cell = ctx->getBoundBelCell(newBel); @@ -371,7 +372,8 @@ class SAPlacer for (const auto &port : cell->ports) { if (port.second.net != nullptr) { auto &cost = costs[port.second.net->udata]; - if (cost.new_cost == 0) continue; + if (cost.new_cost == 0) + continue; cost.new_cost = 0; updates.emplace_back(port.second.net); } @@ -381,7 +383,8 @@ class SAPlacer for (const auto &port : other_cell->ports) if (port.second.net != nullptr) { auto &cost = costs[port.second.net->udata]; - if (cost.new_cost == 0) continue; + if (cost.new_cost == 0) + continue; cost.new_cost = 0; updates.emplace_back(port.second.net); } @@ -483,7 +486,8 @@ class SAPlacer const float post_legalise_dia_scale = 1.5; Placer1Cfg cfg; - struct CostChange { + struct CostChange + { wirelen_t curr_cost; wirelen_t new_cost; }; diff --git a/common/settings.h b/common/settings.h index e1f1166a..0c4a67db 100644 --- a/common/settings.h +++ b/common/settings.h @@ -38,7 +38,7 @@ class Settings if (!pair.second) { return boost::lexical_cast(pair.first->second); } - + } catch (boost::bad_lexical_cast &) { log_error("Problem reading setting %s, using default value\n", name); } @@ -51,7 +51,7 @@ class Settings auto pair = ctx->settings.emplace(id, std::to_string(value)); if (!pair.second) { ctx->settings[pair.first->first] = value; - } + } } private: diff --git a/generic/arch.cc b/generic/arch.cc index 583c74d8..3e95159a 100644 --- a/generic/arch.cc +++ b/generic/arch.cc @@ -184,20 +184,11 @@ void Arch::setGroupDecal(GroupId group, DecalXY decalxy) refreshUiGroup(group); } -void Arch::setWireAttr(IdString wire, IdString key, const std::string &value) -{ - wires.at(wire).attrs[key] = value; -} +void Arch::setWireAttr(IdString wire, IdString key, const std::string &value) { wires.at(wire).attrs[key] = value; } -void Arch::setPipAttr(IdString pip, IdString key, const std::string &value) -{ - pips.at(pip).attrs[key] = value; -} +void Arch::setPipAttr(IdString pip, IdString key, const std::string &value) { pips.at(pip).attrs[key] = value; } -void Arch::setBelAttr(IdString bel, IdString key, const std::string &value) -{ - bels.at(bel).attrs[key] = value; -} +void Arch::setBelAttr(IdString bel, IdString key, const std::string &value) { bels.at(bel).attrs[key] = value; } // --------------------------------------------------------------- diff --git a/gui/designwidget.cc b/gui/designwidget.cc index 34f151a8..a45752fc 100644 --- a/gui/designwidget.cc +++ b/gui/designwidget.cc @@ -37,17 +37,14 @@ TreeView::~TreeView() {} void TreeView::mouseMoveEvent(QMouseEvent *event) { QModelIndex index = indexAt(event->pos()); - if (index!=current) { + if (index != current) { current = index; Q_EMIT hoverIndexChanged(index); } QTreeView::mouseMoveEvent(event); } -void TreeView::leaveEvent(QEvent *event) -{ - Q_EMIT hoverIndexChanged(QModelIndex()); -} +void TreeView::leaveEvent(QEvent *event) { Q_EMIT hoverIndexChanged(QModelIndex()); } DesignWidget::DesignWidget(QWidget *parent) : QWidget(parent), ctx(nullptr), selectionModel(nullptr) { @@ -828,26 +825,26 @@ void DesignWidget::onHoverIndexChanged(QModelIndex index) TreeModel::Item *item = treeModel->nodeFromIndex(index); if (item->type() != ElementType::NONE) { std::vector decals = getDecals(item->type(), item->id()); - if (decals.size()>0) + if (decals.size() > 0) Q_EMIT hover(decals.at(0)); return; } } - Q_EMIT hover(DecalXY()); + Q_EMIT hover(DecalXY()); } void DesignWidget::onHoverPropertyChanged(QtBrowserItem *item) { - if (item!=nullptr) { + if (item != nullptr) { QtProperty *selectedProperty = item->property(); ElementType type = getElementTypeByName(selectedProperty->propertyId()); if (type != ElementType::NONE) { IdString value = ctx->id(selectedProperty->valueText().toStdString()); - if (value!=IdString()) { + if (value != IdString()) { auto node = treeModel->nodeForIdType(type, value); if (node) { std::vector decals = getDecals((*node)->type(), (*node)->id()); - if (decals.size()>0) + if (decals.size() > 0) Q_EMIT hover(decals.at(0)); return; } diff --git a/gui/designwidget.h b/gui/designwidget.h index 91da556a..0248d2c7 100644 --- a/gui/designwidget.h +++ b/gui/designwidget.h @@ -20,9 +20,9 @@ #ifndef DESIGNWIDGET_H #define DESIGNWIDGET_H +#include #include #include -#include #include "nextpnr.h" #include "qtgroupboxpropertybrowser.h" #include "qtpropertymanager.h" @@ -35,7 +35,7 @@ NEXTPNR_NAMESPACE_BEGIN class TreeView : public QTreeView { Q_OBJECT - + public: explicit TreeView(QWidget *parent = 0); ~TreeView(); @@ -44,6 +44,7 @@ class TreeView : public QTreeView Q_SIGNALS: void hoverIndexChanged(QModelIndex index); + private: QModelIndex current; }; diff --git a/ice40/arch.cc b/ice40/arch.cc index 43a3dec2..f008b617 100644 --- a/ice40/arch.cc +++ b/ice40/arch.cc @@ -414,7 +414,6 @@ std::vector> Arch::getPipAttrs(PipId pip) const return ret; } - // ----------------------------------------------------------------------- BelId Arch::getPackagePinBel(const std::string &pin) const diff --git a/ice40/arch.h b/ice40/arch.h index 37f663d9..27d5db9f 100644 --- a/ice40/arch.h +++ b/ice40/arch.h @@ -817,7 +817,7 @@ struct Arch : BaseCtx bool isBelLocationValid(BelId bel) const; // Helper function for above - bool logicCellsCompatible(const CellInfo** it, const size_t size) const; + bool logicCellsCompatible(const CellInfo **it, const size_t size) const; // ------------------------------------------------- // Assign architecure-specific arguments to nets and cells, which must be diff --git a/ice40/arch_place.cc b/ice40/arch_place.cc index b436f7d7..c97b9c26 100644 --- a/ice40/arch_place.cc +++ b/ice40/arch_place.cc @@ -27,13 +27,13 @@ NEXTPNR_NAMESPACE_BEGIN -bool Arch::logicCellsCompatible(const CellInfo** it, const size_t size) const +bool Arch::logicCellsCompatible(const CellInfo **it, const size_t size) const { bool dffs_exist = false, dffs_neg = false; const NetInfo *cen = nullptr, *clk = nullptr, *sr = nullptr; int locals_count = 0; - for (auto cell : boost::make_iterator_range(it, it+size)) { + for (auto cell : boost::make_iterator_range(it, it + size)) { NPNR_ASSERT(cell->type == id_ICESTORM_LC); if (cell->lcInfo.dffEnable) { if (!dffs_exist) { diff --git a/ice40/bitstream.cc b/ice40/bitstream.cc index 124be092..e56ed37d 100644 --- a/ice40/bitstream.cc +++ b/ice40/bitstream.cc @@ -472,7 +472,6 @@ void write_asc(const Context *ctx, std::ostream &out) } } - if (ctx->args.type == ArchArgs::LP1K || ctx->args.type == ArchArgs::HX1K) { set_config(ti, config.at(iey).at(iex), "IoCtrl.IE_" + std::to_string(iez), !input_en); set_config(ti, config.at(iey).at(iex), "IoCtrl.REN_" + std::to_string(iez), !pullup); @@ -512,8 +511,6 @@ void write_asc(const Context *ctx, std::ostream &out) set_config(ti, config.at(ciey).at(ciex), "IoCtrl.cf_bit_35", !pullup); } } - - } } else if (cell.second->type == ctx->id("SB_GB")) { // no cell config bits @@ -914,7 +911,7 @@ bool read_asc(Context *ctx, std::istream &in) } if (isUsed) { NetInfo *net = ctx->wire_to_net[pi.dst]; - if (net!=nullptr) { + if (net != nullptr) { WireId wire; wire.index = pi.dst; ctx->unbindWire(wire); diff --git a/ice40/chains.cc b/ice40/chains.cc index bb20b60b..e8a7ab17 100644 --- a/ice40/chains.cc +++ b/ice40/chains.cc @@ -97,7 +97,8 @@ class ChainConstrainer } tile.push_back(cell); chains.back().cells.push_back(cell); - bool split_chain = (!ctx->logicCellsCompatible(tile.data(), tile.size())) || (int(chains.back().cells.size()) > max_length); + bool split_chain = (!ctx->logicCellsCompatible(tile.data(), tile.size())) || + (int(chains.back().cells.size()) > max_length); if (split_chain) { CellInfo *passout = make_carry_pass_out(cell->ports.at(ctx->id("COUT"))); tile.pop_back(); diff --git a/ice40/delay.cc b/ice40/delay.cc index d76aaefb..54905551 100644 --- a/ice40/delay.cc +++ b/ice40/delay.cc @@ -121,7 +121,7 @@ struct model_params_t int delta_sp4; int delta_sp12; - static const model_params_t &get(const ArchArgs& args) + static const model_params_t &get(const ArchArgs &args) { static const model_params_t model_hx8k = {588, 129253, 8658, 118333, 23915, -73105, 57696, -86797, 89, 3706, -316, -575, -158, -296}; diff --git a/ice40/gfx.cc b/ice40/gfx.cc index 74338b8d..320081c5 100644 --- a/ice40/gfx.cc +++ b/ice40/gfx.cc @@ -21,7 +21,8 @@ NEXTPNR_NAMESPACE_BEGIN -void gfxTileWire(std::vector &g, int x, int y, int w, int h, GfxTileWireId id, GraphicElement::style_t style) +void gfxTileWire(std::vector &g, int x, int y, int w, int h, GfxTileWireId id, + GraphicElement::style_t style) { GraphicElement el; el.type = GraphicElement::TYPE_LINE; @@ -462,7 +463,7 @@ void gfxTileWire(std::vector &g, int x, int y, int w, int h, Gfx g.push_back(el); } - if (idx <= 15 && (x == 0 || x == w-1) && y == 1) { + if (idx <= 15 && (x == 0 || x == w - 1) && y == 1) { float y1 = y - (0.03 + 0.0025 * (60 - idx - 4)); el.x1 = x2; @@ -478,7 +479,7 @@ void gfxTileWire(std::vector &g, int x, int y, int w, int h, Gfx g.push_back(el); } - if (idx >= 4 && (x == 0 || x == w-1) && y == h-2) { + if (idx >= 4 && (x == 0 || x == w - 1) && y == h - 2) { float y1 = y + 2.0 - (0.03 + 0.0025 * (60 - idx)); el.x1 = x1; diff --git a/ice40/pack.cc b/ice40/pack.cc index 07c003d1..35503298 100644 --- a/ice40/pack.cc +++ b/ice40/pack.cc @@ -735,11 +735,13 @@ static void pack_special(Context *ctx) pllout_a_used++; } - if (pllout_a_used > 1) - log_error("PLL '%s' is using multiple ports mapping to PLLOUT_A output of the PLL\n", ci->name.c_str(ctx)); + if (pllout_a_used > 1) + log_error("PLL '%s' is using multiple ports mapping to PLLOUT_A output of the PLL\n", + ci->name.c_str(ctx)); - if (pllout_b_used > 1) - log_error("PLL '%s' is using multiple ports mapping to PLLOUT_B output of the PLL\n", ci->name.c_str(ctx)); + if (pllout_b_used > 1) + log_error("PLL '%s' is using multiple ports mapping to PLLOUT_B output of the PLL\n", + ci->name.c_str(ctx)); for (auto port : ci->ports) { PortInfo &pi = port.second; @@ -754,16 +756,18 @@ static void pack_special(Context *ctx) newname = "PLLOUT_B"; if (pi.name == ctx->id("PLLOUTCORE")) newname = "PLLOUT_A"; - if (pi.name == ctx->id("PLLOUTGLOBALA")) + if (pi.name == ctx->id("PLLOUTGLOBALA")) newname = "PLLOUT_A"; if (pi.name == ctx->id("PLLOUTGLOBALB")) newname = "PLLOUT_B"; if (pi.name == ctx->id("PLLOUTGLOBAL")) newname = "PLLOUT_A"; - - if (pi.name == ctx->id("PLLOUTGLOBALA") || pi.name == ctx->id("PLLOUTGLOBALB") || pi.name == ctx->id("PLLOUTGLOBAL")) + + if (pi.name == ctx->id("PLLOUTGLOBALA") || pi.name == ctx->id("PLLOUTGLOBALB") || + pi.name == ctx->id("PLLOUTGLOBAL")) log_warning("PLL '%s' is using port %s but implementation does not actually " - "use the global clock output of the PLL\n", ci->name.c_str(ctx), pi.name.str(ctx).c_str()); + "use the global clock output of the PLL\n", + ci->name.c_str(ctx), pi.name.str(ctx).c_str()); if (pi.name == ctx->id("PACKAGEPIN")) { if (!is_pad) { @@ -782,13 +786,16 @@ static void pack_special(Context *ctx) if (packed->ports.count(ctx->id(newname)) == 0) { if (ci->ports[pi.name].net == nullptr) { - log_warning("PLL '%s' has unknown unconnected port '%s' - ignoring\n", ci->name.c_str(ctx), pi.name.c_str(ctx)); + log_warning("PLL '%s' has unknown unconnected port '%s' - ignoring\n", ci->name.c_str(ctx), + pi.name.c_str(ctx)); continue; } else { if (ctx->force) { - log_error("PLL '%s' has unknown connected port '%s'\n", ci->name.c_str(ctx), pi.name.c_str(ctx)); + log_error("PLL '%s' has unknown connected port '%s'\n", ci->name.c_str(ctx), + pi.name.c_str(ctx)); } else { - log_warning("PLL '%s' has unknown connected port '%s' - ignoring\n", ci->name.c_str(ctx), pi.name.c_str(ctx)); + log_warning("PLL '%s' has unknown connected port '%s' - ignoring\n", ci->name.c_str(ctx), + pi.name.c_str(ctx)); continue; } } @@ -840,13 +847,15 @@ static void pack_special(Context *ctx) packagepin_cell->ports.erase(pll_packagepin_driver.port); } - log_info(" constrained PLL '%s' to %s\n", packed->name.c_str(ctx), ctx->getBelName(bel).c_str(ctx)); + log_info(" constrained PLL '%s' to %s\n", packed->name.c_str(ctx), + ctx->getBelName(bel).c_str(ctx)); packed->attrs[ctx->id("BEL")] = ctx->getBelName(bel).str(ctx); pll_bel = bel; constrained = true; } if (!constrained) { - log_error("Could not constrain PLL '%s' to any PLL Bel (too many PLLs?)\n", packed->name.c_str(ctx)); + log_error("Could not constrain PLL '%s' to any PLL Bel (too many PLLs?)\n", + packed->name.c_str(ctx)); } } @@ -865,8 +874,7 @@ static void pack_special(Context *ctx) // If we have a net connected to LOCK, make sure it only drives LUTs. auto port = packed->ports[ctx->id("LOCK")]; if (port.net != nullptr) { - log_info(" PLL '%s' has LOCK output, need to pass all outputs via LUT\n", - ci->name.c_str(ctx)); + log_info(" PLL '%s' has LOCK output, need to pass all outputs via LUT\n", ci->name.c_str(ctx)); bool found_lut = false; bool all_luts = true; unsigned int lut_count = 0; -- cgit v1.2.3