From 11579a1046640a21b79aa6a1f579d3464267d0a1 Mon Sep 17 00:00:00 2001 From: David Shah Date: Sun, 4 Nov 2018 15:11:01 +0000 Subject: ecp5: EBR clocking fix Signed-off-by: David Shah --- ecp5/arch.cc | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'ecp5/arch.cc') diff --git a/ecp5/arch.cc b/ecp5/arch.cc index a7bebd61..e035c0f4 100644 --- a/ecp5/arch.cc +++ b/ecp5/arch.cc @@ -683,15 +683,18 @@ TimingClockingInfo Arch::getPortClockingInfo(const CellInfo *cell, IdString port info.clockToQ.delay = 395; } } else if (cell->type == id_DP16KD) { - for (auto c : boost::adaptors::reverse(port.str(this))) { + std::string port_name = port.str(this); + for (auto c : boost::adaptors::reverse(port_name)) { if (std::isdigit(c)) continue; - if (c == 'A') + if (c == 'A') { info.clock_port = id_CLKA; - else if (c == 'B') + break; + } else if (c == 'B') { info.clock_port = id_CLKB; - else - NPNR_ASSERT_FALSE_STR("bad ram port"); + break; + } else + NPNR_ASSERT_FALSE_STR("bad ram port " + port.str(this)); } info.edge = (str_or_default(cell->params, info.clock_port == id_CLKB ? id("CLKBMUX") : id("CLKAMUX"), "CLK") == "INV") -- cgit v1.2.3