From 98fe4438f18bc48558f403ebd2d4e80e0989b5c0 Mon Sep 17 00:00:00 2001 From: David Shah Date: Tue, 26 Nov 2019 16:10:07 +0000 Subject: ECP5 support is no longer experimental Signed-off-by: David Shah --- ecp5/synth/.gitignore | 3 - ecp5/synth/blinky.v | 77 -------- ecp5/synth/blinky.ys | 2 - ecp5/synth/ulx3s_empty.config | 439 ------------------------------------------ 4 files changed, 521 deletions(-) delete mode 100644 ecp5/synth/.gitignore delete mode 100644 ecp5/synth/blinky.v delete mode 100644 ecp5/synth/blinky.ys delete mode 100644 ecp5/synth/ulx3s_empty.config (limited to 'ecp5/synth') diff --git a/ecp5/synth/.gitignore b/ecp5/synth/.gitignore deleted file mode 100644 index f4dfa215..00000000 --- a/ecp5/synth/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -*.bit -*_out.config - diff --git a/ecp5/synth/blinky.v b/ecp5/synth/blinky.v deleted file mode 100644 index 9c6b187b..00000000 --- a/ecp5/synth/blinky.v +++ /dev/null @@ -1,77 +0,0 @@ -module top(input clk_pin, input btn_pin, output [7:0] led_pin, output gpio0_pin); - - wire clk; - wire [7:0] led; - wire btn; - wire gpio0; - - (* LOC="G2" *) (* IO_TYPE="LVCMOS33" *) - TRELLIS_IO #(.DIR("INPUT")) clk_buf (.B(clk_pin), .O(clk)); - - (* LOC="R1" *) (* IO_TYPE="LVCMOS33" *) - TRELLIS_IO #(.DIR("INPUT")) btn_buf (.B(btn_pin), .O(btn)); - - (* LOC="B2" *) (* IO_TYPE="LVCMOS33" *) - TRELLIS_IO #(.DIR("OUTPUT")) led_buf_0 (.B(led_pin[0]), .I(led[0])); - (* LOC="C2" *) (* IO_TYPE="LVCMOS33" *) - TRELLIS_IO #(.DIR("OUTPUT")) led_buf_1 (.B(led_pin[1]), .I(led[1])); - (* LOC="C1" *) (* IO_TYPE="LVCMOS33" *) - TRELLIS_IO #(.DIR("OUTPUT")) led_buf_2 (.B(led_pin[2]), .I(led[2])); - (* LOC="D2" *) (* IO_TYPE="LVCMOS33" *) - TRELLIS_IO #(.DIR("OUTPUT")) led_buf_3 (.B(led_pin[3]), .I(led[3])); - - (* LOC="D1" *) (* IO_TYPE="LVCMOS33" *) - TRELLIS_IO #(.DIR("OUTPUT")) led_buf_4 (.B(led_pin[4]), .I(led[4])); - (* LOC="E2" *) (* IO_TYPE="LVCMOS33" *) - TRELLIS_IO #(.DIR("OUTPUT")) led_buf_5 (.B(led_pin[5]), .I(led[5])); - (* LOC="E1" *) (* IO_TYPE="LVCMOS33" *) - TRELLIS_IO #(.DIR("OUTPUT")) led_buf_6 (.B(led_pin[6]), .I(led[6])); - (* LOC="H3" *) (* IO_TYPE="LVCMOS33" *) - TRELLIS_IO #(.DIR("OUTPUT")) led_buf_7 (.B(led_pin[7]), .I(led[7])); - - - (* LOC="L2" *) (* IO_TYPE="LVCMOS33" *) - TRELLIS_IO #(.DIR("OUTPUT")) gpio0_buf (.B(gpio0_pin), .I(gpio0)); - - localparam ctr_width = 24; - localparam ctr_max = 2**ctr_width - 1; - reg [ctr_width-1:0] ctr = 0; - reg [9:0] pwm_ctr = 0; - reg dir = 0; - - always@(posedge clk) begin - ctr <= btn ? ctr : (dir ? ctr - 1'b1 : ctr + 1'b1); - if (ctr[ctr_width-1 : ctr_width-3] == 0 && dir == 1) - dir <= 1'b0; - else if (ctr[ctr_width-1 : ctr_width-3] == 7 && dir == 0) - dir <= 1'b1; - pwm_ctr <= pwm_ctr + 1'b1; - end - - reg [9:0] brightness [0:7]; - localparam bright_max = 2**10 - 1; - reg [7:0] led_reg; - - genvar i; - generate - for (i = 0; i < 8; i=i+1) begin - always @ (posedge clk) begin - if (ctr[ctr_width-1 : ctr_width-3] == i) - brightness[i] <= bright_max; - else if (ctr[ctr_width-1 : ctr_width-3] == (i - 1)) - brightness[i] <= ctr[ctr_width-4:ctr_width-13]; - else if (ctr[ctr_width-1 : ctr_width-3] == (i + 1)) - brightness[i] <= bright_max - ctr[ctr_width-4:ctr_width-13]; - else - brightness[i] <= 0; - led_reg[i] <= pwm_ctr < brightness[i]; - end - end - endgenerate - - assign led = led_reg; - - // Tie GPIO0, keep board from rebooting - assign gpio0 = 1'b1; - -endmodule diff --git a/ecp5/synth/blinky.ys b/ecp5/synth/blinky.ys deleted file mode 100644 index fb359380..00000000 --- a/ecp5/synth/blinky.ys +++ /dev/null @@ -1,2 +0,0 @@ -read_verilog blinky.v -synth_ecp5 -noccu2 -nomux -nodram -json blinky.json diff --git a/ecp5/synth/ulx3s_empty.config b/ecp5/synth/ulx3s_empty.config deleted file mode 100644 index 815e7f0d..00000000 --- a/ecp5/synth/ulx3s_empty.config +++ /dev/null @@ -1,439 +0,0 @@ -.device LFE5U-45F - -.tile CIB_R10C3:PVT_COUNT2 -unknown: F2B0 -unknown: F3B0 -unknown: F5B0 -unknown: F11B0 -unknown: F13B0 - -.tile CIB_R5C1:CIB_PLL1 -enum: CIB.JA3MUX 0 -enum: CIB.JB3MUX 0 - - -.tile CIB_R5C89:CIB_PLL1 -enum: CIB.JA3MUX 0 -enum: CIB.JB3MUX 0 - - -.tile CIB_R70C3:CIB_PLL3 -enum: CIB.JA3MUX 0 -enum: CIB.JB3MUX 0 - - -.tile CIB_R70C42:VCIB_DCU0 -enum: CIB.JA1MUX 0 -enum: CIB.JA3MUX 0 -enum: CIB.JA5MUX 0 -enum: CIB.JA7MUX 0 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JC0MUX 0 -enum: CIB.JC2MUX 0 -enum: CIB.JC4MUX 0 -enum: CIB.JC6MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C43:VCIB_DCUA -enum: CIB.JA1MUX 0 -enum: CIB.JA3MUX 0 -enum: CIB.JA5MUX 0 -enum: CIB.JA7MUX 0 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JC0MUX 0 -enum: CIB.JC2MUX 0 -enum: CIB.JC4MUX 0 -enum: CIB.JC6MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C44:VCIB_DCUB -enum: CIB.JA1MUX 0 -enum: CIB.JA3MUX 0 -enum: CIB.JA5MUX 0 -enum: CIB.JA7MUX 0 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JC0MUX 0 -enum: CIB.JC2MUX 0 -enum: CIB.JC4MUX 0 -enum: CIB.JC6MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C45:VCIB_DCUC -enum: CIB.JA1MUX 0 -enum: CIB.JA3MUX 0 -enum: CIB.JA5MUX 0 -enum: CIB.JA7MUX 0 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JC0MUX 0 -enum: CIB.JC2MUX 0 -enum: CIB.JC4MUX 0 -enum: CIB.JC6MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C46:VCIB_DCUD -enum: CIB.JA1MUX 0 -enum: CIB.JA5MUX 0 -enum: CIB.JA7MUX 0 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JC0MUX 0 -enum: CIB.JC2MUX 0 -enum: CIB.JC4MUX 0 -enum: CIB.JC6MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C47:VCIB_DCUF -enum: CIB.JA1MUX 0 -enum: CIB.JA3MUX 0 -enum: CIB.JA5MUX 0 -enum: CIB.JA7MUX 0 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JC0MUX 0 -enum: CIB.JC2MUX 0 -enum: CIB.JC4MUX 0 -enum: CIB.JC6MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C48:VCIB_DCU3 -enum: CIB.JA5MUX 0 -enum: CIB.JA7MUX 0 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JC0MUX 0 -enum: CIB.JC4MUX 0 -enum: CIB.JC6MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C49:VCIB_DCU2 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C50:VCIB_DCUG -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C51:VCIB_DCUH -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C52:VCIB_DCUI -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C53:VCIB_DCU1 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 - - -.tile CIB_R70C69:VCIB_DCU0 -enum: CIB.JA1MUX 0 -enum: CIB.JA3MUX 0 -enum: CIB.JA5MUX 0 -enum: CIB.JA7MUX 0 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JC0MUX 0 -enum: CIB.JC2MUX 0 -enum: CIB.JC4MUX 0 -enum: CIB.JC6MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C6:CIB_EFB0 -enum: CIB.JB3MUX 0 -enum: CIB.JC6MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C70:VCIB_DCUA -enum: CIB.JA1MUX 0 -enum: CIB.JA3MUX 0 -enum: CIB.JA5MUX 0 -enum: CIB.JA7MUX 0 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JC0MUX 0 -enum: CIB.JC2MUX 0 -enum: CIB.JC4MUX 0 -enum: CIB.JC6MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C71:VCIB_DCUB -enum: CIB.JA1MUX 0 -enum: CIB.JA3MUX 0 -enum: CIB.JA5MUX 0 -enum: CIB.JA7MUX 0 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JC0MUX 0 -enum: CIB.JC2MUX 0 -enum: CIB.JC4MUX 0 -enum: CIB.JC6MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C72:VCIB_DCUC -enum: CIB.JA1MUX 0 -enum: CIB.JA3MUX 0 -enum: CIB.JA5MUX 0 -enum: CIB.JA7MUX 0 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JC0MUX 0 -enum: CIB.JC2MUX 0 -enum: CIB.JC4MUX 0 -enum: CIB.JC6MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C73:VCIB_DCUD -enum: CIB.JA1MUX 0 -enum: CIB.JA5MUX 0 -enum: CIB.JA7MUX 0 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JC0MUX 0 -enum: CIB.JC2MUX 0 -enum: CIB.JC4MUX 0 -enum: CIB.JC6MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C74:VCIB_DCUF -enum: CIB.JA1MUX 0 -enum: CIB.JA3MUX 0 -enum: CIB.JA5MUX 0 -enum: CIB.JA7MUX 0 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JC0MUX 0 -enum: CIB.JC2MUX 0 -enum: CIB.JC4MUX 0 -enum: CIB.JC6MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C75:VCIB_DCU3 -enum: CIB.JA5MUX 0 -enum: CIB.JA7MUX 0 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JC0MUX 0 -enum: CIB.JC4MUX 0 -enum: CIB.JC6MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C76:VCIB_DCU2 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C77:VCIB_DCUG -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C78:VCIB_DCUH -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C79:VCIB_DCUI -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB7MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD6MUX 0 - - -.tile CIB_R70C7:CIB_EFB1 -enum: CIB.JA3MUX 0 -enum: CIB.JA4MUX 0 -enum: CIB.JA5MUX 0 -enum: CIB.JA6MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB4MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JB6MUX 0 -enum: CIB.JC3MUX 0 -enum: CIB.JC4MUX 0 -enum: CIB.JC5MUX 0 -enum: CIB.JD3MUX 0 -enum: CIB.JD4MUX 0 -enum: CIB.JD5MUX 0 - - -.tile CIB_R70C80:VCIB_DCU1 -enum: CIB.JB1MUX 0 -enum: CIB.JB3MUX 0 -enum: CIB.JB5MUX 0 -enum: CIB.JD0MUX 0 -enum: CIB.JD2MUX 0 - - -.tile CIB_R70C87:CIB_PLL3 -enum: CIB.JA3MUX 0 -enum: CIB.JB3MUX 0 - - -.tile MIB_R10C40:CMUX_UL_0 -arc: G_DCS0CLK0 G_VPFN0000 - - -.tile MIB_R10C41:CMUX_UR_0 -arc: G_DCS0CLK1 G_VPFN0000 - - -.tile MIB_R58C40:CMUX_LL_0 -arc: G_DCS1CLK0 G_VPFN0000 - - -.tile MIB_R58C41:CMUX_LR_0 -arc: G_DCS1CLK1 G_VPFN0000 - - -.tile MIB_R71C4:EFB0_PICB0 -unknown: F54B1 -unknown: F56B1 -unknown: F82B1 -unknown: F94B1 - -.tile MIB_R71C3:BANKREF8 -unknown: F18B0 - -- cgit v1.2.3