From dcb09ec8deddb1c90c53acc157baf941fb875142 Mon Sep 17 00:00:00 2001 From: gatecat Date: Fri, 30 Apr 2021 11:07:31 +0100 Subject: interchange: Implement getWireType Signed-off-by: gatecat --- fpga_interchange/arch.cc | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) (limited to 'fpga_interchange/arch.cc') diff --git a/fpga_interchange/arch.cc b/fpga_interchange/arch.cc index 441c2e1f..c49a172b 100644 --- a/fpga_interchange/arch.cc +++ b/fpga_interchange/arch.cc @@ -461,7 +461,24 @@ WireId Arch::getWireByName(IdStringList name) const return ret; } -IdString Arch::getWireType(WireId wire) const { return id(""); } +IdString Arch::getWireType(WireId wire) const +{ + int tile = wire.tile, index = wire.index; + if (tile == -1) { + // Nodal wire + const TileWireRefPOD &wr = chip_info->nodes[wire.index].tile_wires[0]; + tile = wr.tile; + index = wr.index; + } + auto &w2t = chip_info->tiles[tile].tile_wire_to_type; + if (index >= w2t.ssize()) + return IdString(); + int wire_type = w2t[index]; + if (wire_type == -1) + return IdString(); + return IdString(chip_info->wire_types[wire_type].name); +} + std::vector> Arch::getWireAttrs(WireId wire) const { return {}; } // ----------------------------------------------------------------------- -- cgit v1.2.3